絲?。?a target="_blank" title="Marking" href="/cd74hct4075e/marking.html">CD74HCT4075E；Package：PDIP；CDx4HCT4075 Triple 3-Input OR Gates

1 Features ? LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V ? CMOS input logic compatible – II ≤ 1 μA at VOL, VOH ? Buffered inputs ? 4.5 V to 5.5 V operation ? Wide operating temperature range: -55°C to +125°C ? Supports fanout up to 10 LSTTL loads ? Significant power r

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TI

德州儀器

Triple 3-input OR gate

GENERAL DESCRIPTION The 74HC/HCT4075 are high-speed Si-gate CMOS devices and are pin compatible with the “4075” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT4075 provide the 3-input OR function. FEATURES ? Output capability: standard

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PHI

PHI

Triple 3-input OR gate

1. General description The 74HC4075; 74HCT4075 is a triple 3-input OR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits ? Complies with JEDEC standard no. 7A ? Input levels: ? For 7

文件：200.61 Kbytes 頁數(shù)：11 Pages

NEXPERIA

安世

Triple 3-input OR gate

GENERAL DESCRIPTION The 74HC/HCT4075 are high-speed Si-gate CMOS devices and are pin compatible with the “4075” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT4075 provide the 3-input OR function. FEATURES ? Output capability: standard

文件：32.5 Kbytes 頁數(shù)：5 Pages

PHI

PHI