絲?。?strong>CD54AC02F3A；Package：CDIP(J)；CDx4AC02 Quadruple 2-Input Positive-NOR Gates

1 Features ? AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply voltage ? Speed of bipolar F, AS, and S, with significantly reduced power consumption ? Balanced propagation delays ? ±24mA output drive current – Fanout to 15 F devices ? SCR-latchup

文件：2.23614 Mbytes 頁數(shù)：31 Pages

TI

德州儀器

Quad 2-Input NOR Gate

Description The CD54AC02F3A and CD54ACT02F3A are quad 2-input NOR gates that utilize the Harris Advanced CMOS Logic technology. Features ? This Circuit is Processed in Accordance to MIL-STD-883 ?? and is Fully Conformant Under the Provisions of Paragraph 1.2.1. ? Exceeds 2kV ESD Protection

文件：26.08 Kbytes 頁數(shù)：4 Pages

INTERSIL

QUADRUPLE 2-INPUT POSITIVE-NOR GATES

文件：509.92 Kbytes 頁數(shù)：13 Pages

TI

德州儀器

QUADRUPLE 2-INPUT POSITIVE-NOR GATES

文件：480.32 Kbytes 頁數(shù)：13 Pages

TI

德州儀器

絲印：CD54AC02F3A；Package：CDIP(J)；CDx4AC02 Quadruple 2-Input Positive-NOR Gates

1 Features ? AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply voltage ? Speed of bipolar F, AS, and S, with significantly reduced power consumption ? Balanced propagation delays ? ±24mA output drive current – Fanout to 15 F devices ? SCR-latchup

文件：2.23614 Mbytes 頁數(shù)：31 Pages

TI

德州儀器

Quad 2-Input NOR Gate

Description\nThe CD54AC02F3A and CD54ACT02F3A are quad 2-input NOR gates that utilize the Harris Advanced CMOS Logic technology. ? This Circuit is Processed in Accordance to MIL-STD-883\n?? and is Fully Conformant Under the Provisions of Paragraph 1.2.1.\n? Exceeds 2kV ESD Protection MIL-STD-883, Method 3015\n? Meets JEDEC Standard No. 20\n? SCR - Latch-Up-Resistant CMOS Process and Circuit Design\n? Speed of Bipolar FAST/A/S;

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