Quad EXCLUSIVE-OR Gate

General Description The CD4030C EXCLUSIVE-OR gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. All inputs are protected against static discharge with diodes to VDD and VSS. Features ■ Wide supply voltage range: 3.0V

文件：45.82 Kbytes 頁(yè)數(shù)：5 Pages

FAIRCHILD

仙童半導(dǎo)體

CMOS Quad Exclusive-OR Gate

Description The CD4030BMS types consist of four independent Exclusive-OR gates. The CD4030BMS provides the system designer with a means for direct implementation of the Exclusive-OR function. Features ? High Voltage Type (20V Rating) ? Medium-Speed Operation ??? - tPHL, tPLH = 65ns (typ) at V

文件：59.66 Kbytes 頁(yè)數(shù)：7 Pages

INTERSIL

CMOS QUAD EXCLUSIVE-OR GATE

文件：497.8 Kbytes 頁(yè)數(shù)：11 Pages

TI

德州儀器

4路2輸入異或門(mén)

The CD4030 is a quad 2-input EXCLUSIVE-OR gate. The outputs are fully buffered for the highest noise immunity and pattern insensitivity to output impedance.It operates over a recommended VDD power supply range of 3V to 15V referenced to VSS (usually ground). Unused inputs must be connected to VDD, V ? Wide supply voltage range from 3V to 15V\n? Fully static operation\n? 5V, 10V, and 15V parametric ratings\n? Standardized symmetrical output characteristics\n? Inputs and outputs are protected against electrostatic effects\n? Specified from -40℃ to +125℃\n? Packaging information: DIP14/SOP14/TSSOP;

I-CORE

中微愛(ài)芯

Quad EXCLUSIVE-OR Gate

The EXCLUSIVE-OR gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P channel enhancement mode transistors. All inputs are protected against static discharge with diodes to VDDand VSS.Acquired by Texas Instruments on September 23rd, 2011.

TI

德州儀器

CMOS Quad Exclusive-OR Gate

Renesas

瑞薩

CMOS Quad Exclusive-OR Gate

Features: Medium-speed operation—tpy_. tp = 65 ns (typ.) at Vpp = 10 V, C= 50 pF = 100% tested for quiescent current at 20 V Standardized, symmetrical output characteristics 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full package- temperature ran

文件：971.74 Kbytes 頁(yè)數(shù)：20 Pages

TI

德州儀器

CMOS High Voltage Logic

Features High Input Voltage up to 20V Noise immunity greater than 50% All outputs buffered Drives x2 Low-Power TTL loads or x1 LSTTL load Symmetrical Sink & Source Currents Direct drop-in replacement for obsolete components in long term programs.

文件：295.69 Kbytes 頁(yè)數(shù)：5 Pages

SS

CMOS High Voltage Logic

Features High Input Voltage up to 20V Noise immunity greater than 50% All outputs buffered Drives x2 Low-Power TTL loads or x1 LSTTL load Symmetrical Sink & Source Currents Direct drop-in replacement for obsolete components in long term programs.

文件：295.69 Kbytes 頁(yè)數(shù)：5 Pages

SS

絲印：CD4030BE；Package：PDIP；CMOS Quad Exclusive-OR Gate

Features: Medium-speed operation—tpy_. tp = 65 ns (typ.) at Vpp = 10 V, C= 50 pF = 100% tested for quiescent current at 20 V Standardized, symmetrical output characteristics 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full package- temperature ran

文件：971.74 Kbytes 頁(yè)數(shù)：20 Pages

TI

德州儀器