CMOS Quad 2 Line to 1 Line Data Selector/Multiplexer

Description CD40257BMS is a data selector/multiplexer featuring three state outputs which can interface directly with and drive data lines of bus oriented systems. The CD40257BMS is supplied in these 16-lead outline packages: Braze Seal DIP H4T Frit Seal DIP H1E Ceramic Flatpa

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INTERSIL

Buffered Triple 3-Input NAND Gate

General Description These triple gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered

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SYC

Buffered Triple 3-Input NAND,NOR Gate

文件：127.67 Kbytes 頁(yè)數(shù)：6 Pages

NSC

國(guó)半

SEMICONDUCTORS

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ETCList of Unclassifed Manufacturers

未分類制造商

CMOS QUAD 2-LINE-TO-1-LINE DATA SELECTOR/MULTIPLEXER

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TI

德州儀器

3路3輸入與非門

The CD4025 is a triple 3-input NOR gate. The outputs are fully buffered for the highest noise immunity and pattern insensitivity to output impedance.It operates over a recommended VDD power supply range of 3V to 15V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or ? Wide supply voltage range from 3V to 15V\n? Fully static operation\n? 5V, 10V, and 15V parametric ratings\n? Standardized symmetrical output characteristics\n? Inputs and outputs are protected against electrostatic effects\n? Specified from -40℃ to +125℃\n? Packaging information: DIP14/SOP14/TSSOP;

I-CORE

中微愛(ài)芯

CMOS Quad 2-Line-to-1-Line Data Selector/Multi plexer

Features: | ? 3-state outputs | ? Standardized, symmetrical output characteristics 8 100% tested for quigscent current at 0V . | 8 Maximum input current of uA at 18V ~~ | over full package-temperature range; | 100 nA at 18 V.and 25°C | Noise margin (aver full package- | temperature

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TI

德州儀器

絲印：CD40257BE；Package：PDIP；CMOS Quad 2-Line-to-1-Line Data Selector/Multi plexer

Features: | ? 3-state outputs | ? Standardized, symmetrical output characteristics 8 100% tested for quigscent current at 0V . | 8 Maximum input current of uA at 18V ~~ | over full package-temperature range; | 100 nA at 18 V.and 25°C | Noise margin (aver full package- | temperature

文件：457.34 Kbytes 頁(yè)數(shù)：10 Pages

TI

德州儀器

絲印：CD40257BE；Package：PDIP；CMOS Quad 2-Line-to-1-Line Data Selector/Multi plexer

Features: | ? 3-state outputs | ? Standardized, symmetrical output characteristics 8 100% tested for quigscent current at 0V . | 8 Maximum input current of uA at 18V ~~ | over full package-temperature range; | 100 nA at 18 V.and 25°C | Noise margin (aver full package- | temperature

文件：457.34 Kbytes 頁(yè)數(shù)：10 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cd40257be/marking.html">CD40257BE；Package：PDIP；CMOS Quad 2-Line-to-1-Line Data Selector/Multi plexer

Features: | ? 3-state outputs | ? Standardized, symmetrical output characteristics 8 100% tested for quigscent current at 0V . | 8 Maximum input current of uA at 18V ~~ | over full package-temperature range; | 100 nA at 18 V.and 25°C | Noise margin (aver full package- | temperature

文件：457.34 Kbytes 頁(yè)數(shù)：10 Pages

TI

德州儀器