The CD4011 NAND gates provide the system designer with direct implementation of the NAND function

Description The CD4011 NAND gates provide the system designer with direct implementation of the NAND function. Features ● Operating Voltage Range: 3.0 to 18 V ● Maximum input current of 1 at 18 V over full package- temperature range 100 nA at 18 V and 25 °C ● Noise margin (over full packa

文件：2.05852 Mbytes 頁數(shù)：4 Pages

TGS

CMOS Decade Up-Down Counter/Latch/Display Driver

Features Separate clock-up and clock-down lines Capable of driving common cathode LEDs and other displays directly Allows cascading without any external circuitry 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package- temperatu

文件：487.38 Kbytes 頁數(shù)：13 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cd40110be/marking.html">CD40110BE；Package：PDIP；CMOS Decade Up-Down Counter/Latch/Display Driver

Features Separate clock-up and clock-down lines Capable of driving common cathode LEDs and other displays directly Allows cascading without any external circuitry 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package- temperatu

文件：487.38 Kbytes 頁數(shù)：13 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cd40110be/marking.html">CD40110BE；Package：PDIP；CMOS Decade Up-Down Counter/Latch/Display Driver

Features Separate clock-up and clock-down lines Capable of driving common cathode LEDs and other displays directly Allows cascading without any external circuitry 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package- temperatu

文件：487.38 Kbytes 頁數(shù)：13 Pages

TI

德州儀器

CMOS HIGH-SPEED 8-BIT BIDIRECTIONAL CMOS/TTL INTERFACE LEVEL CONVERTER

文件：382.89 Kbytes 頁數(shù)：6 Pages

HARRIS

CMOS HIGH-SPEED 8-BIT BIDIRECTIONAL CMOS/TTL INTERFACE LEVEL CONVERTER

文件：382.89 Kbytes 頁數(shù)：6 Pages

HARRIS

Programmable Dual 4-Bit Terminator

Features: One standard “8” output will drive eight terminator circuits. Will terminate a CMOS data bus with up to 40 B~series inputs inputs or 3-stats outputs connected at Vop of 5 V. Input terminals protected by standard “B series ESD protection network. Preserves final logic state. Outp

文件：327.07 Kbytes 頁數(shù)：8 Pages

TI

德州儀器

絲印：CD40117BE；Package：PDIP；Programmable Dual 4-Bit Terminator

Features: One standard “8” output will drive eight terminator circuits. Will terminate a CMOS data bus with up to 40 B~series inputs inputs or 3-stats outputs connected at Vop of 5 V. Input terminals protected by standard “B series ESD protection network. Preserves final logic state. Outp

文件：327.07 Kbytes 頁數(shù)：8 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cd40117be/marking.html">CD40117BE；Package：PDIP；Programmable Dual 4-Bit Terminator

Features: One standard “8” output will drive eight terminator circuits. Will terminate a CMOS data bus with up to 40 B~series inputs inputs or 3-stats outputs connected at Vop of 5 V. Input terminals protected by standard “B series ESD protection network. Preserves final logic state. Outp

文件：327.07 Kbytes 頁數(shù)：8 Pages

TI

德州儀器

CMOS NAND Gates

Features: Quiescent current specified to 15 V Maximum input leakage of 1 uA at 15 V (full package-temperature range) 1-V noise margin (full package-temperature range)

文件：550.23 Kbytes 頁數(shù)：10 Pages

TI

德州儀器