CMOS Decade Up-Down Counter/Latch/Display Driver

Features Separate clock-up and clock-down lines Capable of driving common cathode LEDs and other displays directly Allows cascading without any external circuitry 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package- temperatu

文件：487.38 Kbytes 頁數(shù)：13 Pages

TI

德州儀器

CMOS DECADE UP-DOWN COUNTER/LATCH/DISPLAY DRIVER

文件：324.84 Kbytes 頁數(shù)：10 Pages

TI

德州儀器

CMOs Decade Up-Down Counter/Latch/Display Driver

文件：431.31 Kbytes 頁數(shù)：12 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cd40110be/marking.html">CD40110BE；Package：PDIP；CMOS Decade Up-Down Counter/Latch/Display Driver

Features Separate clock-up and clock-down lines Capable of driving common cathode LEDs and other displays directly Allows cascading without any external circuitry 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package- temperatu

文件：487.38 Kbytes 頁數(shù)：13 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cd40110be/marking.html">CD40110BE；Package：PDIP；CMOS Decade Up-Down Counter/Latch/Display Driver

Features Separate clock-up and clock-down lines Capable of driving common cathode LEDs and other displays directly Allows cascading without any external circuitry 100% tested for quiescent current at 20 V Maximum input current of 1 uA at 18 V over full package- temperatu

文件：487.38 Kbytes 頁數(shù)：13 Pages

TI

德州儀器

CMOs Decade Up-Down Counter/Latch/Display Driver

文件：431.31 Kbytes 頁數(shù)：12 Pages

TI

德州儀器

CMOS Decade Up-Down Counter/Latch/Display Driver High-Voltage Type (20-V Rating)

文件：431.31 Kbytes 頁數(shù)：12 Pages

TI

德州儀器

CMOs Decade Up-Down Counter/Latch/Display Driver

文件：431.31 Kbytes 頁數(shù)：12 Pages

TI

德州儀器

CMOs Decade Up-Down Counter/Latch/Display Driver

文件：431.31 Kbytes 頁數(shù)：12 Pages

TI

德州儀器

CMOS 十進(jìn)制加減計(jì)數(shù)器/鎖存器/顯示驅(qū)動(dòng)器

CD40110B is a dual-clocked up/down counter with a special preconditioning circuit that allows the counter to be clocked, via positive going inputs, up or down regardless of the state or timing (within 100 ns typ.) of the other clock line. The clock signal is fed into the control logic and Johnson co ? Separate clock-up and clock-down lines\n? Capable of driving common cathode LEDs and other displays directly\n? Allows cascading without any external circuitry\n? 100% tested for quiescent current at 20 V\n? Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 1;

TI

德州儀器