AFE5401RGCTEP中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書

1 Features

? Integrated Analog Front-End Includes:

– Quad LNA, Equalizer, PGA, Antialiasing Filter,

and ADC

? Input-Referred Noise with 30dB PGA Gain:

– 2.9nV/√ Hz for 15dB LNA Gain

– 2.0nV/√ Hz for 18dB LNA Gain with

HIGH_POW_LNA Mode

? Simultaneous Sampling Across Channels

? Programmable LNA Gain:

12dB, 15dB, 16.5dB, and 18dB

? Programmable Equalizer Modes

? Built-In Diagnostic Modes

? Temperature Sensor

? Programmable-Gain Amplifiers (PGAs):

– 0dB to 30dB in 3dB Steps

? Programmable, Third-Order, Antialiasing Filter:

– 7MHz, 8MHz, 10.5MHz, and 12MHz

? Analog-to-Digital Converter (ADC):

– Quad Channel, 12 Bits, 25MSPS per Channel

– No External Decoupling Required for

References

? Parallel CMOS Outputs

? 64-mW Total Core Power per Channel at

25MSPS per Channel

? Supplies: 1.8V and 3.3V

? Package: 9mm × 9mm VQFN-64

? Device Temperature: –40°C to 125°C Ambient

Operating Temperature Range

? Supports defense, aerospace, and medical

applications

– Controlled baseline

– One assembly and test site

– One fabrication site

– Extended product life cycle

– Product traceability

– VID V62/25601

2 Applications

? Automotive Radar

? Data Acquisition

? SONAR?

3 Description

The AFE5401-EP is an analog front-end (AFE),

targeting applications where the level of integration

is critical. The device includes four channels, with

each channel comprising a low-noise amplifier (LNA),

a programmable equalizer (EQ), a programmable gain

amplifier (PGA), and an antialias filter followed by a

high-speed, 12-bit, analog-to-digital converter (ADC)

at 25MSPS per channel.

Each of the four differential input pairs are amplified

by an LNA and are followed by a PGA with a

programmable gain range from 0dB to 30dB. An

antialias, low-pass filter (LPF) is also integrated

between the PGA and ADC for each channel.

Each LNA, PGA, and antialiasing filter output is

differential (limited to 2VPP). The antialiasing filter

drives the on-chip, 12-bit, 25MSPS ADC. The four

ADC outputs are multiplexed on a 12-bit, parallel,

CMOS output bus.

The device is available in a 9mm × 9mm, VQFN-64

package and is specified over a temperature range

of –40°C to +125°C. For more information, contact

[email protected].