Clock Recovery and Data Retiming Phase-Locked Loop

PRODUCT DESCRIPTION The AD800 and AD802 employ a second order phase-locked loop architecture to perform clock recovery and data retiming on Non-Return to Zero, NRZ, data. This architecture is capable of supporting data rates between 20 Mbps and 160 Mbps. The products described here have been defi

文件：253.41 Kbytes 頁數(shù)：12 Pages

AD

亞德諾

155 Mbps Clock and Data Recovery IC

The AD800 and AD802 employ a second order phase-locked loop architecture to perform clock recovery and data re timing on Non-Return to Zero, NRZ, data. This architecture is capable of supporting data rates between 20 Mbps and 160 Mbps. The products described here have been defined to work with stand

ADI

亞德諾

Dual 8-,10-,12-Bit High Bandwidth Multiplying DACs with Serial Interface

GENERAL DESCRIPTION The AD5429/AD5439/AD54491 are CMOS 8-, 10-, and 12-bit dual-channel current output digital-to-analog converters, respectively. These devices operate from a 2.5 V to 5.5 V power supply, making them suited to battery-powered and other applications. FEATURES 10 MHz mult

文件：860.81 Kbytes 頁數(shù)：32 Pages

AD

亞德諾

14-Bit, 1 MSPS, Differential, Programmable Input PulSAR ADC

GENERAL DESCRIPTION The AD7952 is a 14-bit, charge redistribution, successive approximation register (SAR) architecture analog-to-digital converter (ADC) fabricated on Analog Devices, Inc.’s iCMOS high voltage process. The device is configured through hardware or via a dedicated write-only serial

文件：868.1 Kbytes 頁數(shù)：32 Pages

AD

亞德諾

Low Noise, High Speed Amplifier for 16-Bit Systems

GENERAL DESCRIPTION The AD8021 is an exceptionally high performance, high speed voltage feedback amplifier that can be used in 16-bit resolution systems. It is designed to have both low voltage and low current noise (2.1 nV/√Hz typical and 2.1 pA/√Hz typical) while operating at the lowest qu

文件：467.93 Kbytes 頁數(shù)：20 Pages

AD

亞德諾

Dual-Current Output, Parallel Input, 16 /14-Bit Multiplying DACs with 4-Quadrant Resistors

GENERAL DESCRIPTION The AD5547/AD5557 are dual precision, 16-/14-bit, multiplying, low power, current-output, parallel input, digital-to-analog converters (DACs). They are designed to operate from single +5 V supply with ±10 V multiplying references for 4-quadrant outputs with 6.8 MHz bandwidth.

文件：405.32 Kbytes 頁數(shù)：20 Pages

AD

亞德諾

12-/14-Bit High Bandwidth Multiplying DACs with Serial Interface

GENERAL DESCRIPTION The AD5444/AD54461 are CMOS 12-bit and 14-bit, current output, digital-to-analog converters (DACs). Operating from a single 2.5 V to 5.5 V power supply, these devices are suited for battery-powered and other applications. FEATURES 12 MHz multiplying bandwidth INL of ±

文件：726.77 Kbytes 頁數(shù)：28 Pages

AD

亞德諾

16-Bit, 250 kSPS PulSAR ADC in MSOP/QFN

GENERAL DESCRIPTION The AD7685 is a 16-bit, charge redistribution successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD, between 2.3 V to 5.5 V. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversi

文件：484.14 Kbytes 頁數(shù)：28 Pages

AD

亞德諾

Dual-Current Output, Parallel Input, 16-/14-Bit Multiplying DACs with 4-Quadrant Resistors

GENERAL DESCRIPTION The AD5547/AD5557 are dual precision, 16-/14-bit, multiplying, low power, current-output, parallel input, digital-to-analog converters (DACs). They are designed to operate from single +5 V supply with ±10 V multiplying references for 4-quadrant outputs with 6.8 MHz bandwidth.

文件：405.32 Kbytes 頁數(shù)：20 Pages

AD

亞德諾

18-Bit, 2 MSPS PulSAR 15 mW ADC in LFCSP (QFN)

GENERAL DESCRIPTION The AD7986 is an 18-bit, 2 MSPS successive approximation, analog-to-digital converter (ADC). It contains a low power, high speed, 18-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and a versatile serial interfac

文件：472.25 Kbytes 頁數(shù)：28 Pages

AD

亞德諾