AD8021開發(fā)板套件編程器的評估板-運算放大器規(guī)格書PDF中文資料

AD8021屬于開發(fā)板套件編程器的評估板-運算放大器。由亞德諾半導體技術有限公司制造生產(chǎn)的AD8021評估板 - 運算放大器運算放大器評估板是裝有元器件的電路，用于提供特定集成電路或器件的工作實例。該產(chǎn)品族中的電路板提供了運算放大器實例。每個 IC 的通道類型有單通道、雙通道、三通道、四通道和八通道，放大器類型包括音頻、自動歸零、緩沖器、斬波器、電流反饋、電流檢測、差動、差分、四通道、儀表、隔離、J-FET、限幅、對數(shù)、功率、可編程增益、采樣保持、跨阻、可變增益、視頻、電壓反饋和零漂移。

GENERAL DESCRIPTION

The AD7986 is an 18-bit, 2 MSPS successive approximation, analog-to-digital converter (ADC). It contains a low power, high speed, 18-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and a versatile serial interface port. On the rising edge of CNV, the AD7986 samples the voltage difference between the IN+ and IN? pins. The voltages on these pins usually swing in opposite phases between 0 V and VREF. It features a very high sampling rate turbo mode (TURBO = high) and a reduced power normal mode (TURBO = low) for low power applications where the power is scaled with the throughput.

FEATURES

18-bit resolution with no missing codes

Throughput: 2 MSPS (TURBO = high), 1.5 MSPS (TURBO = low)

Low power dissipation

15 mW at 2 MSPS, with external reference

26 mW at 2 MSPS with internal reference

INL: ±1 LSB typical, ±2.5 LSB maximum

SNR

95.5 dB, with on-chip reference

97.0 dB, with external reference

4.096 V internal reference: typical drift of 10 ppm/°C

True differential analog input voltage range: ±VREF

0 V to VREFwith VREFup to 5.0 V

Allows use of any input range

No pipeline delay

Logic interface: 1.8 V/2.5 V/2.7 V

Serial interface: SPI/QSPI?/MICROWIRE?/DSP compatible

Ability to daisy-chain multiple ADCs with busy indicator

20-lead 4 mm × 4 mm LFCSP (QFN)

APPLICATIONS

Battery-powered equipment

Data acquisition systems

Medical instruments

Seismic data acquisition systems