8-Output 3.3V PCIe Zero-Delay/Fanout Clock Buffer

The 9DBL0851 8-output zero-delay/fan-out buffer is a 3.3V member of Renesas' Full-Featured PCIe family. The 9DBL0851 supports PCIe Gen1 through Gen5 and both Common and Independent Reference Clock architectures.\n\nFor information regarding evaluation boards and material, please contact your local?s ? Additive PCIe Gen5 CC jitter < 60fs RMS (fan-out mode)\n? PCIe Gen5 CC jitter < 150fs RMS (High-BW ZDB Mode)\n? 8 Low-Power HCSL (LP-HCSL) outputs eliminate 4 resistors per output pair\n? Direct connection to 85Ω transmission lines\n? Dedicated OE# pin for each output\n? Spread Spectrum tolerant\n;

Renesas

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Package：48-VFQFN 裸露焊盤；包裝：管件 類別：集成電路（IC） 應(yīng)用特定時鐘/定時 描述：IC CLK FANOUT/BUFF ZD 48VFQFPN

Renesas Electronics America Inc

Package：48-VFQFN 裸露焊盤；包裝：托盤 類別：集成電路（IC） 應(yīng)用特定時鐘/定時 描述：CLOCK BUFFER 3.3V LP-HCSL PCIE

Renesas Electronics America Inc

Package：48-VFQFN 裸露焊盤；包裝：管件 類別：集成電路（IC） 應(yīng)用特定時鐘/定時 描述：CLOCK BUFFER 3.3V 48VFQFPN

Renesas Electronics America Inc