8-output 3.3V PCIe Zero-Delay Buffer

文件：340.29 Kbytes 頁數(shù)：19 Pages

IDT

8-output 3.3V PCIe Zero-Delay Buffer

文件：354.38 Kbytes 頁數(shù)：19 Pages

IDT

8-output 3.3V PCIe Zero-Delay Buffer

文件：340.29 Kbytes 頁數(shù)：19 Pages

IDT

8-output 3.3V PCIe Zero-Delay Buffer

文件：340.29 Kbytes 頁數(shù)：19 Pages

IDT

8-output 3.3V PCIe Zero-Delay Buffer

文件：354.38 Kbytes 頁數(shù)：19 Pages

IDT

8-output 3.3V PCIe Zero-Delay Buffer

文件：354.38 Kbytes 頁數(shù)：19 Pages

IDT

8-output 3.3V PCIe Zero-Delay Buffer

文件：340.29 Kbytes 頁數(shù)：19 Pages

IDT

8-output 3.3V PCIe Zero-Delay Buffer

文件：340.29 Kbytes 頁數(shù)：19 Pages

IDT

8-output 3.3V PCIe Zero-Delay Buffer

文件：340.29 Kbytes 頁數(shù)：19 Pages

IDT

8-Output 3.3V PCIe Zero-Delay/Fanout Clock Buffer with Loss of Signal Indicator

The 9DBL0843 Zero-Delay/Fanout buffer is a low-power high-performance member of Reneas' Full-Featured PCIe family. The buffer supports PCIe Gen1–5 and provides a Loss of Signal (LOS) indicator. The device is an easy upgrade from the 9DBL0841. ? Loss of Signal (LOS) output; supports fault tolerant systems\n? Supports PCIe Gen1–5 CC in High Bandwidth ZDB mode\n? Spread Spectrum tolerant; allows reduction of EMI\n? Easy AC-coupling to other logic families, see application note AN-891.\n? Space saving 6 × 6 mm 48-VFQFPN; minimal board space;

Renesas

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