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          首頁 >879>規(guī)格書列表

          型號(hào)下載 訂購功能描述制造商 上傳企業(yè)LOGO

          87972I-147

          Low Skew, 1-to-12 LVCMOS/LVTTL Clock Multiplier/Zero Delay Buffer

          Features ? Fully integrated PLL ? Fourteen LVCMOS/LVTTL outputs; (12)clocks, (1)feedback, (1)sync ? Selectable crystal oscillator interface or LVCMOS/LVTTL reference clock inputs ? CLK0, CLK1 can accept the following input levels: LVCMOS or LVTTL ? Output frequency range: 10MHz to 150MHz

          文件:414.34 Kbytes 頁數(shù):19 Pages

          RENESAS

          瑞薩

          87973

          Low Skew, 1-to-12 LVCMOS / LVTTL Clock Multiplier/Zero Delay Buffer

          FEATURES ? Fully integrated PLL ? Fourteen LVCMOS/LVTTL outputs; twelve clock outputs, one feedback, one sync ? Selectable LVCMOS/LVTTL or differential CLK, nCLK inputs ? CLK0, CLK1 can accept the following input levels: LVCMOS or LVTTL ? CLK, nCLK pair can accept the following differential

          文件:432.88 Kbytes 頁數(shù):18 Pages

          RENESAS

          瑞薩

          87973DYI-147LF

          絲?。?a target="_blank" title="Marking" href="/ics87973di147l/marking.html">ICS87973DI147L;Package:LQFP;Low Skew, 1-to-12 LVCMOS/ LVTTL Clock Multiplier/ Zero Delay Buffer

          Features ? Fully integrated PLL ? Fourteen LVCMOS/LVTTL outputs to include: twelve clocks, one feedback, one sync ? Selectable differential CLK, nCLK inputs or LVCMOS/LVTTL reference clock inputs ? CLK0, CLK1 can accept the following input levels: LVCMOS or LVTTL ? CLK, nCLK pair can accep

          文件:663.57 Kbytes 頁數(shù):21 Pages

          RENESAS

          瑞薩

          87973DYI-147LFT

          絲?。?a target="_blank" title="Marking" href="/ics87973di147l/marking.html">ICS87973DI147L;Package:LQFP;Low Skew, 1-to-12 LVCMOS/ LVTTL Clock Multiplier/ Zero Delay Buffer

          Features ? Fully integrated PLL ? Fourteen LVCMOS/LVTTL outputs to include: twelve clocks, one feedback, one sync ? Selectable differential CLK, nCLK inputs or LVCMOS/LVTTL reference clock inputs ? CLK0, CLK1 can accept the following input levels: LVCMOS or LVTTL ? CLK, nCLK pair can accep

          文件:663.57 Kbytes 頁數(shù):21 Pages

          RENESAS

          瑞薩

          87973DYILF

          絲印:ICS87973DYILF;Package:LQFP;Low Skew, 1-to-12 LVCMOS / LVTTL Clock Multiplier/Zero Delay Buffer

          FEATURES ? Fully integrated PLL ? Fourteen LVCMOS/LVTTL outputs; twelve clock outputs, one feedback, one sync ? Selectable LVCMOS/LVTTL or differential CLK, nCLK inputs ? CLK0, CLK1 can accept the following input levels: LVCMOS or LVTTL ? CLK, nCLK pair can accept the following differential

          文件:432.88 Kbytes 頁數(shù):18 Pages

          RENESAS

          瑞薩

          87973DYILFT

          絲?。?a target="_blank" title="Marking" href="/ics87973dyilf/marking.html">ICS87973DYILF;Package:LQFP;Low Skew, 1-to-12 LVCMOS / LVTTL Clock Multiplier/Zero Delay Buffer

          FEATURES ? Fully integrated PLL ? Fourteen LVCMOS/LVTTL outputs; twelve clock outputs, one feedback, one sync ? Selectable LVCMOS/LVTTL or differential CLK, nCLK inputs ? CLK0, CLK1 can accept the following input levels: LVCMOS or LVTTL ? CLK, nCLK pair can accept the following differential

          文件:432.88 Kbytes 頁數(shù):18 Pages

          RENESAS

          瑞薩

          87973I-147

          Low Skew, 1-to-12 LVCMOS/ LVTTL Clock Multiplier/ Zero Delay Buffer

          Features ? Fully integrated PLL ? Fourteen LVCMOS/LVTTL outputs to include: twelve clocks, one feedback, one sync ? Selectable differential CLK, nCLK inputs or LVCMOS/LVTTL reference clock inputs ? CLK0, CLK1 can accept the following input levels: LVCMOS or LVTTL ? CLK, nCLK pair can accep

          文件:663.57 Kbytes 頁數(shù):21 Pages

          RENESAS

          瑞薩

          87974CYILF

          絲?。?a target="_blank" title="Marking" href="/ics87974cyilf/marking.html">ICS87974CYILF;Package:LQFP;Low Skew, 1-to-15, LVCMOS/LVTTL Clock Generator

          FEATURES ? Fully integrated PLL ? Fifteen single ended 3.3V LVCMOS/LVTTL outputs ? Two LVCMOS/LVTTL clock inputs for redundant clock applications ? CLK0 and CLK1 accepts the following input levels: LVCMOS/LVTTL ? Output frequency range: 8.33MHz to 125MHz ? VCO range: 200MHz to 500MHz ? Ext

          文件:440.14 Kbytes 頁數(shù):17 Pages

          RENESAS

          瑞薩

          87974CYILFT

          絲?。?a target="_blank" title="Marking" href="/ics87974cyilf/marking.html">ICS87974CYILF;Package:LQFP;Low Skew, 1-to-15, LVCMOS/LVTTL Clock Generator

          FEATURES ? Fully integrated PLL ? Fifteen single ended 3.3V LVCMOS/LVTTL outputs ? Two LVCMOS/LVTTL clock inputs for redundant clock applications ? CLK0 and CLK1 accepts the following input levels: LVCMOS/LVTTL ? Output frequency range: 8.33MHz to 125MHz ? VCO range: 200MHz to 500MHz ? Ext

          文件:440.14 Kbytes 頁數(shù):17 Pages

          RENESAS

          瑞薩

          87974I

          Low Skew, 1-to-15, LVCMOS/LVTTL Clock Generator

          FEATURES ? Fully integrated PLL ? Fifteen single ended 3.3V LVCMOS/LVTTL outputs ? Two LVCMOS/LVTTL clock inputs for redundant clock applications ? CLK0 and CLK1 accepts the following input levels: LVCMOS/LVTTL ? Output frequency range: 8.33MHz to 125MHz ? VCO range: 200MHz to 500MHz ? Ext

          文件:440.14 Kbytes 頁數(shù):17 Pages

          RENESAS

          瑞薩

          產(chǎn)品屬性

          • 產(chǎn)品編號(hào):

            879

          • 制造商:

            Adafruit Industries LLC

          • 類別:

            光電器件 > LED 可尋址,專用

          • 包裝:

            散裝

          • 配置:

            7 段顯示

          • LED 數(shù):

            4 位

          • 顏色:

            黃色

          • 控制器類型:

            MAX7219

          • 接口:

            I2C

          • 安裝類型:

            用戶自定義

          • 描述:

            ADDRESS LED 7 SEGMENT I2C YLW

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          更多879供應(yīng)商 更新時(shí)間2026-1-17 16:06:00
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