PCI EXPRESS??Jitter Attenuator

文件：756.82 Kbytes 頁(yè)數(shù)：15 Pages

IDT

PCI EXPRESS??JITTER ATTENUATOR

文件：807.1 Kbytes 頁(yè)數(shù)：18 Pages

IDT

PCI EXPRESS??JITTER ATTENUATOR

文件：807.1 Kbytes 頁(yè)數(shù)：18 Pages

IDT

PCI EXPRESS??JITTER ATTENUATOR

文件：281.47 Kbytes 頁(yè)數(shù)：13 Pages

IDT

PCI EXPRESS??JITTER ATTENUATOR

文件：281.47 Kbytes 頁(yè)數(shù)：13 Pages

IDT

22 AWG solid tinned copper conductors, PVC insulation,

文件：96.44 Kbytes 頁(yè)數(shù)：2 Pages

ETCList of Unclassifed Manufacturers

未分類(lèi)制造商

22 AWG solid tinned copper conductors, PVC insulation,

文件：96.44 Kbytes 頁(yè)數(shù)：2 Pages

ETCList of Unclassifed Manufacturers

未分類(lèi)制造商

PCI Express? Jitter Attenuator

The 874002 is a high performance Differential-to-LVDS Jitter Attenuator designed for use in PCI Express? systems. In some PCI Express? systems, such as those found in desktop PCs, the PCI Express? clocks are generated from a low bandwidth, high phase noise PLL frequency synthesizer. In these systems Two differential LVDS output pair\nOne differential clock input\nCLK and nCLK supports the following input types: LVPECL, LVDS, LVHSTL, SSTL, HCSL\nOutput frequency range: 98MHz - 160MHz\nInput frequency range: 98MHz - 128MHz\nVCO range: 490MHz - 640MHz\nCycle-to-cycle jitter: 35ps (maximum)\n3.3V o;

Renesas

瑞薩

IC TIMING

Renesas

瑞薩

IC TIMING

Renesas

瑞薩