PCI Express/Jitter Attenuator

GENERAL DESCRIPTION The 874002 is a high performance Differential-to-LVDS Jitter Attenuator designed for use in PCI Express systems. In some PCI Express systems, such as those found in desktop PCs, the PCI Express clocks are generated from a low bandwidth, high phase noise PLL frequency synth

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PCI Express? Jitter Attenuator

The 874002 is a high performance Differential-to-LVDS Jitter Attenuator designed for use in PCI Express? systems. In some PCI Express? systems, such as those found in desktop PCs, the PCI Express? clocks are generated from a low bandwidth, high phase noise PLL frequency synthesizer. In these systems Two differential LVDS output pair\nOne differential clock input\nCLK and nCLK supports the following input types: LVPECL, LVDS, LVHSTL, SSTL, HCSL\nOutput frequency range: 98MHz - 160MHz\nInput frequency range: 98MHz - 128MHz\nVCO range: 490MHz - 640MHz\nCycle-to-cycle jitter: 35ps (maximum)\n3.3V o;

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PCI EXPRESS?/JITTER ATTENUATOR

GENERAL DESCRIPTION The ICS874002-02 is a high performance Differential-to-LVDS Jitter Attenuator designed for use in PCI Express? systems. In some PCI Express? systems, such as those found in desktop PCs, the PCI Express? clocks are generated from a low bandwidth, high phase noise PLL frequ

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IC TIMING

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IC TIMING

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Package：20-TSSOP（0.173"，4.40mm 寬）；包裝：管件 類別：集成電路（IC） 應(yīng)用特定時鐘/定時 描述：IC JITTER ATTENUATOR 20-TSSOP

Renesas Electronics America Inc

Package：20-TSSOP（0.173"，4.40mm 寬）；包裝：卷帶（TR） 類別：集成電路（IC） 應(yīng)用特定時鐘/定時 描述：IC PCI EXPRSS/JITT ATTEN 20TSSOP

Renesas Electronics America Inc