絲印：211BI03N；Package：SOIC；Low Skew, 1-to-2, Differential-to-LVHSTL Fanout Buffer

Features ? Two differential LVHSTL compatible outputs ? One differential CLK, nCLK input pair ? CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL ? Maximum output frequency: 700MHz ? Translates any single ended input signal to LVHSTL levels w

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Low Skew, 1-to-2 Differential-to-HSTL Fanout Buffer

FEATURES ? Two differential HSTL compatible outputs ? One differential CLK, nCLK input pair ? CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, HSTL, SSTL, HCSL ? Maximum output frequency: 700MHz ? Translates any single-ended input signal to HSTL levels with r

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絲?。?a target="_blank" title="Marking" href="/ics8521ayi03n/marking.html">ICS8521AYI03N；Package：LQFP；Low Skew, 1-to-9 Differential-to-LVHSTL Fanout Buffer

FEATURES ? 9 LVHSTL outputs ? Redundant differential CLK0, nCLK0 and CLK1, nCLK1 inputs ? CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL ? Maximum output frequency: 500MHz ? Output skew: 50ps (maximum) ? Part-to-part skew: 250ps (maxim

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絲?。?a target="_blank" title="Marking" href="/ics8521ayi03n/marking.html">ICS8521AYI03N；Package：LQFP；Low Skew, 1-to-9 Differential-to-LVHSTL Fanout Buffer

FEATURES ? 9 LVHSTL outputs ? Redundant differential CLK0, nCLK0 and CLK1, nCLK1 inputs ? CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL ? Maximum output frequency: 500MHz ? Output skew: 50ps (maximum) ? Part-to-part skew: 250ps (maxim

文件：474.82 Kbytes 頁數(shù)：18 Pages

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Low Skew,1-to-2,Differential-to-LVHSTL Fanout Buffer

The 85211BI-03 is a low skew, high performance 1-to-2 Differential-to-LVHSTL Fanout Buffer. The CLK, nCLK pair can accept most standard differential input levels. The 85211BI-03 is characterized to operate from a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 852 Two differential LVHSTL compatible outputs\nOne differential CLK, nCLK input pair\nCLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL\nMaximum output frequency: 700MHz\nTranslates any single ended input signal to LVHSTL levels with resistor bias on nC;

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IC CLK BUFFER 1:2 700MHZ 8SOIC

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包裝：線軸 類別：電纜，電線 單芯電纜（連接線） 描述：HOOK-UP STRND 16AWG BROWN 1000'

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包裝：線軸 類別：電纜，電線 單芯電纜（連接線） 描述：HOOK-UP STRND 16AWG RED 100'

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