4:2 Differential Clock/Data Multiplexer

Description The 831742I is a high-performance, differential HCSL clock/data multiplexer and fanout buffer. The device is designed for the multiplexing and fanout of high-frequency clock and data signals. The device has four differential, selectable clock/data inputs. The selected input signal

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4:2 Differential Clock/Data Multiplexer

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4:2 Differential Clock/Data Multiplexer

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IDT

4:2 Differential Clock/Data Multiplexer

文件：524.3 Kbytes 頁數(shù)：18 Pages

IDT

4:2 Differential Clock / Data Multiplexer

The 831742I is a high-performance, differential HCSL clock/data multiplexer and fanout buffer. The device is designed for the multiplexing and fanout of high-frequency clock and data signals. The device has four differential, selectable clock/data inputs. The selected input signal is distributed to ·4:1 differential clock/data multiplexer with fanout\n·Four selectable, differential input pairs\n·Each differential input pair can accept the following levels: HCSL, LVDS, LVPECL and SSTL\n·Two differential HCSL output pairs\n·Maximum input/output clock frequency: 700MHz\n·Maximum input/output data;

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