絲?。?strong>81C；Package：SOT-23；350 mW ZENER DIODE 5 TOLERANCE

DESCRIPTION: The CENTRAL SEMICONDUCTOR CMPZ5221B Series silicon zener diode is a high quality voltage regulator for use in industrial, commercial, entertainment and computer applications. Higher voltage devices are available on special order. MARKING CODE: SEE MARKING CODES ON ELECTRICAL CHARACT

文件：100.6 Kbytes 頁數(shù)：2 Pages

CENTRAL

絲?。?strong>81C；Package：SOT-23；AEC-Q101 qualified available

FEATURES ? Silicon planar power Zener diodes ? Standard Zener voltage tolerance is ± 5 with a “B” suffix (e.g.: MMBZ5225B), suffix “C” is ± 2 tolerance. ? High temperature soldering guaranteed: ? 260 °C/4 x 10 s at terminals ? AEC-Q101 qualified available ? ESD capability accord

文件：89.82 Kbytes 頁數(shù)：4 Pages

VISHAYVishay Siliconix

威世威世科技公司

絲?。?strong>81C；Package：SOT-23；Zeners

文件：57.36 Kbytes 頁數(shù)：4 Pages

FAIRCHILD

仙童半導(dǎo)體

絲?。?strong>81C；Package：SOT-23；Zeners

文件：204.54 Kbytes 頁數(shù)：6 Pages

FAIRCHILD

仙童半導(dǎo)體

絲?。?strong>81C；Package：SOT-23；SURFACE MOUNT SILICON ZENER DIODE

文件：401.14 Kbytes 頁數(shù)：2 Pages

CENTRAL

絲?。?strong>81C；Package：SOT-23；SURFACE MOUNT SILICON ZENER DIODE 350mW, 5 TOLERANCE

文件：401.14 Kbytes 頁數(shù)：2 Pages

CENTRAL

絲?。?strong>81C；Package：SOT-23；Zener Voltage Regulator

文件：674.79 Kbytes 頁數(shù)：6 Pages

LEIDITECH

雷卯電子

2048-Bit CMOS STATIC RAM WITH I/O PORTS AND TIMER

GENERAL DESCRIPTION The MSM81C55-5 has a 2k-bit static RAM (256 bytes) with parallel I/O ports and a timer. It uses silicon gate CMOS technology and consumes a standby current of 100 micro ampere, maximum, while the chip is not selected. Featureing a maximum access time of 400 ns, the MSM81C

文件：156.91 Kbytes 頁數(shù)：19 Pages

OKIOki Electric Cable Co.,Ltd

沖電線日本沖電線株式會社

Radiation Hardened 256 x 8 CMOS RAM

The HS-81C55/56RH are radiation hardened RAM and I/O chips fabricated using the Intersil radiation hardened Self Aligned Junction Isolated (SAJI) silicon gate technology. Latch-up free operation is achieved by the use of epitaxial starting material to eliminate the parasitic SCR effect seen in con

文件：86.12 Kbytes 頁數(shù)：14 Pages

INTERSIL

Radiation Hardened 256 x 8 CMOS RAM

The HS-81C55/56RH are radiation hardened RAM and I/O chips fabricated using the Intersil radiation hardened Self Aligned Junction Isolated (SAJI) silicon gate technology. Latch-up free operation is achieved by the use of epitaxial starting material to eliminate the parasitic SCR effect seen in con

文件：86.12 Kbytes 頁數(shù)：14 Pages

INTERSIL