8-BIT SHIFT REGISTERS

The SN54L/74LS166 is an 8-Bit Shift Register. Designed with all inputs buffered, the drive requirements are lowered to one 54/74LS standard load. By utilizing input clamping diodes, switching transients are minimized and system design simplified. The LS166 is a parallel-in or serial-in, serial-

文件：106.68 Kbytes 頁數(shù)：4 Pages

MOTOROLA

摩托羅拉

PARALLEL-LODE 8 BIT SHIFT REGISTERS

文件：290.45 Kbytes 頁數(shù)：7 Pages

SYC

PARALLEL-LOAD 8-BIT SHIFT REGISTERS

文件：646.07 Kbytes 頁數(shù)：16 Pages

TI

德州儀器

8-Bit Parallel-In/Serial-Out Shift Register

General Description These parallel-in or serial-in, serial-out shift registers feature gated clock inputs and an overriding clear input. All inputs are buffered to lower the drive requirements to one normalized load, and input clamping diodes minimize switching transients to simplify system

文件：78.46 Kbytes 頁數(shù)：6 Pages

FAIRCHILD

仙童半導(dǎo)體

8-Bit Parallel-In/Serial-Out Shift Register

General Description These parallel-in or serial-in, serial-out shift registers feature gated clock inputs and an overriding clear input. All inputs are buffered to lower the drive requirements to one normalized load, and input clamping diodes minimize switching transients to simplify system

文件：78.46 Kbytes 頁數(shù)：6 Pages

FAIRCHILD

仙童半導(dǎo)體

8-Bit Parallel-In/Serial-Out Shift Register

General Description These parallel-in or serial-in, serial-out shift registers feature gated clock inputs and an overriding clear input. All inputs are buffered to lower the drive requirements to one normalized load, and input clamping diodes minimize switching transients to simplify system

文件：78.46 Kbytes 頁數(shù)：6 Pages

FAIRCHILD

仙童半導(dǎo)體