Dual 1-of-4 Line Data Selectors/Multiplexers

General Description Each of these data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection to the AND-OR-invert gates. Separate strobe inputs are provided for each of the two four-line sections. Features ■ Permits multiple

文件：52.28 Kbytes 頁數(shù)：5 Pages

FAIRCHILD

仙童半導體

Dual 4-Line to 1-Line Data Selectors/Multiplexers

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

文件：64.89 Kbytes 頁數(shù)：6 Pages

HITACHIHitachi Semiconductor

日立日立公司

4-Line to 16-Line Decoder/Demultiplexer

General Description Each of these 4-line-to-16-line decoders utilizes TTL circuitry to decode four binary-coded inputs into one of sixteen mutually exclusive outputs when both the strobe inputs, G1 and G2, are LOW. The demultiplexing function is performed by using the 4 input lines to address t

文件：52.28 Kbytes 頁數(shù)：5 Pages

FAIRCHILD

仙童半導體

Dual 2-line-to-4-line Decoders/Demultiplexers

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

文件：73.17 Kbytes 頁數(shù)：6 Pages

HITACHIHitachi Semiconductor

日立日立公司

DUAL 1-OF-4 DECODER/ DEMULTIPLEXER

The SN54/74LS155 and SN54/74LS156 are high speed Dual 1-of-4 Decoder/Demultiplexers. These devices have two decoders with common 2-bit Address inputs and separate gated Enable inputs. Decoder “a” has an Enable gate with one active HIGH and one active LOW input. Decoder “b” has two active LOW Enabl

文件：210.75 Kbytes 頁數(shù)：6 Pages

MOTOROLA

摩托羅拉

DUAL 1-OF-4 DECODER/ DEMULTIPLEXER

The SN54/74LS155 and SN54/74LS156 are high speed Dual 1-of-4 Decoder/Demultiplexers. These devices have two decoders with common 2-bit Address inputs and separate gated Enable inputs. Decoder “a” has an Enable gate with one active HIGH and one active LOW input. Decoder “b” has two active LOW Enabl

文件：78 Kbytes 頁數(shù)：4 Pages

MOTOROLA

摩托羅拉

Dual 2-Line to 4-Line Decoders/Demultiplexers

General Description These TTL circuits feature dual 1-line-to-4-line demultiplexers with individual strobes and common binary-address inputs in a single 16-pin package. When both sections are enabled by the strobes, the common address inputs sequentially select and route associated input data t

文件：63.97 Kbytes 頁數(shù)：6 Pages

FAIRCHILD

仙童半導體

DUAL 1-OF-4 DECODER/ DEMULTIPLEXER

? Schottky Process for High Speed ? Multifunction Capability ? Common Address Inputs ? True or Complement Data Demultiplexing ? Input Clamp Diodes Limit High Speed Termination Effects ? ESD > 3500 Volts

文件：181.73 Kbytes 頁數(shù)：4 Pages

SOLIDSTATE

Dual 2-Line to 4-Line Decoders/Demultiplexers

General Description These TTL circuits feature dual 1-line-to-4-line demultiplexers with individual strobes and common binary-address inputs in a single 16-pin package. When both sections are enabled by the strobes, the common address inputs sequentially select and route associated input data t

文件：63.97 Kbytes 頁數(shù)：6 Pages

FAIRCHILD

仙童半導體

Dual 2-line-to-4-Line Decoders / Demultiplexers(with open collector outputs)

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

文件：74.04 Kbytes 頁數(shù)：6 Pages

HITACHIHitachi Semiconductor

日立日立公司