Quadruple 2-input Exclusive-OR Gates(with open collector outputs)

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

文件：45.83 Kbytes 頁數(shù)：5 Pages

HITACHIHitachi Semiconductor

日立日立公司

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES LOW POWER SCHOTTKY

文件：176.16 Kbytes 頁數(shù)：5 Pages

MOTOROLA

摩托羅拉

Low Power Schottky Logic

Features Demultiplexing capability Multiple Input Enables for parallel expansion Active Low Mutually Exclusive Outputs Input Clamp Diodes Limit High Speed Termination Effects Direct drop-in replacement for obsolete components in long term programs.

文件：447.93 Kbytes 頁數(shù)：4 Pages

SS

Decoder/Demultiplexer

General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. Whe

文件：81.81 Kbytes 頁數(shù)：7 Pages

FAIRCHILD

仙童半導(dǎo)體

Low Power Schottky Logic

Features Demultiplexing capability Multiple Input Enables for parallel expansion Active Low Mutually Exclusive Outputs Input Clamp Diodes Limit High Speed Termination Effects Direct drop-in replacement for obsolete components in long term programs.

文件：447.93 Kbytes 頁數(shù)：4 Pages

SS

Decoder/Demultiplexer

General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding.

文件：153.63 Kbytes 頁數(shù)：7 Pages

SOLIDSTATE

Decoder/Demultiplexer

General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding.

文件：153.6 Kbytes 頁數(shù)：7 Pages

SYC

LOW POWER SCHOTTKY

The LSTTL/MSI SN74LS139 is a high speed Dual 1-of-4 Decoder/Demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually exclusive active LOW Outputs.

文件：115.34 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導(dǎo)體

DUAL 1-OF-4 DECODER/ DEMULTIPLEXER

TheLSTTL/MSI SN54/74LS139 is ahigh speed Dual 1-of-4 Decoder/Demultiplexer. The device has two independent decoders, each accepting two inputsand providingfour mutually exclusive active LOW Outputs. Each decoderhas an activeLOW Enable input which can be used as a data input fora 4-output demultipl

文件：173.45 Kbytes 頁數(shù)：5 Pages

MOTOROLA

摩托羅拉

Decoder/Demultiplexer

General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. Whe

文件：81.81 Kbytes 頁數(shù)：7 Pages

FAIRCHILD

仙童半導(dǎo)體