DIVIDE-BY-TWELVE COUNTER

DESCRIPTION- The ’92 is a 4-stage ripple counter containing a high speed flip-flop acting as a divide-by-two and three flip-flops connected as a divide-by-six. HIGH signals on the Master Reset (MR) inputs override the clocks and force all outputs to the LOW state.

文件：256.87 Kbytes 頁數(shù)：3 Pages

NSC

國半

DIVIDE-BY-TWELVE COUNTER

文件：278.94 Kbytes 頁數(shù)：3 Pages

TI

德州儀器

Evaluation Board for 12-bit high speed, low power, successive-approximation ADC

GENERAL DESCRIPTION The AD7492, AD7492-4, and AD7492-5 are 12-bit high speed, low power, successive approximation ADCs. The parts operate from a single 2.7 V to 5.25 V power supply and feature throughput rates up to 1.25 MSPS. They contain a low noise, wide bandwidth track/hold amplifier that can

文件：722.61 Kbytes 頁數(shù)：14 Pages

AD

亞德諾

1.25 MSPS, 16 mW Internal REF and CLK, 12-Bit Parallel ADC

文件：194.66 Kbytes 頁數(shù)：16 Pages

AD

亞德諾

1.25 MSPS, 16 mW Internal REF and CLK, 12-Bit Parallel ADC

文件：513.909 Kbytes 頁數(shù)：24 Pages

AD

亞德諾