Quad 2-Input Exclusive-OR Gate

General Description This device contains four independent gates each of which performs the logic exclusive-OR function.

文件：34.5 Kbytes 頁數(shù)：3 Pages

FAIRCHILD

仙童半導(dǎo)體

7/8 Diameter 5-Turn Wirewound Precision Potentiometer

SPECIAL FEATURES Center Tap Linearity Tape Rear Shaft Extension Flatted Shaft Slotted Shaft (Standard on single gang 7486 without RS) Shaft Lock (7481, 7486 only) High Torque 2–6 oz.-in. (7486 only) Additional Gangs Gold plated solder lug terminals (See optional

文件：78.46 Kbytes 頁數(shù)：5 Pages

BITECH

7/8 Diameter 5-Turn Wirewound Precision Potentiometer

SPECIAL FEATURES Center Tap Linearity Tape Rear Shaft Extension Flatted Shaft Slotted Shaft (Standard on single gang 7486 without RS) Shaft Lock (7481, 7486 only) High Torque 2–6 oz.-in. (7486 only) Additional Gangs Gold plated solder lug terminals (See optional

文件：293.86 Kbytes 頁數(shù)：4 Pages

BITECH

Abrasives, Scotch-Brite Handpads

文件：28.61 Kbytes 頁數(shù)：1 Pages

3M

Quad 2-Input Exclusive-OR Gate

ONSEMI

安森美半導(dǎo)體

包裝：散裝 類別：工具 磨料和表面修整產(chǎn)品 描述：SCOTCH-BRITE ROLOC SURFACE CONDI

3M

1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O

FEATURES: ? 1:1 and 1:2 registered buffer ? 1.8V Operation ? SSTL_18 style clock and data inputs ? Differential CLK input ? Control inputs compatible with LVCMOS levels ? Flow-through architecture for optimum PCB design ? Latch-up performance exceeds 100mA ? ESD >2000V per MIL-STD-883, Met

文件：340.66 Kbytes 頁數(shù)：13 Pages

RENESAS

瑞薩

1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O

FEATURES: ? 1:1 and 1:2 registered buffer ? 1.8V Operation ? SSTL_18 style clock and data inputs ? Differential CLK input ? Control inputs compatible with LVCMOS levels ? Flow-through architecture for optimum PCB design ? Latch-up performance exceeds 100mA ? ESD >2000V per MIL-STD-883, Met

文件：340.66 Kbytes 頁數(shù)：13 Pages

RENESAS

瑞薩

1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O

FEATURES: ? 1:1 and 1:2 registered buffer ? 1.8V Operation ? SSTL_18 style clock and data inputs ? Differential CLK input ? Control inputs compatible with LVCMOS levels ? Flow-through architecture for optimum PCB design ? Latch-up performance exceeds 100mA ? ESD >2000V per MIL-STD-883, Met

文件：340.66 Kbytes 頁數(shù)：13 Pages

RENESAS

瑞薩

1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O

FEATURES: ? 1:1 and 1:2 registered buffer ? 1.8V Operation ? SSTL_18 style clock and data inputs ? Differential CLK input ? Control inputs compatible with LVCMOS levels ? Flow-through architecture for optimum PCB design ? Latch-up performance exceeds 100mA ? ESD >2000V per MIL-STD-883, Met

文件：340.66 Kbytes 頁數(shù)：13 Pages

RENESAS

瑞薩