CMOS TRIPLE BUS SyncFIFO? WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2

? Two independent FIFOs (64 X 36 storage capacity each) buffer data between bidirectional 36-bit port A and two unidirectional 18/9-bit ports (Port B transmits, Port C receives) ? Clock frequencies up to 67 MHz (10 ns access time) Free-running clock lines for each port: CLKA, CLKB and CLKC, m

文件：570.92 Kbytes 頁數(shù)：27 Pages

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瑞薩

CMOS TRIPLE BUS SyncFIFO? WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2

? Two independent FIFOs (64 X 36 storage capacity each) buffer data between bidirectional 36-bit port A and two unidirectional 18/9-bit ports (Port B transmits, Port C receives) ? Clock frequencies up to 67 MHz (10 ns access time) Free-running clock lines for each port: CLKA, CLKB and CLKC, m

文件：570.92 Kbytes 頁數(shù)：27 Pages

RENESAS

瑞薩

CMOS TRIPLE BUS SyncFIFO? WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2

? Two independent FIFOs (64 X 36 storage capacity each) buffer data between bidirectional 36-bit port A and two unidirectional 18/9-bit ports (Port B transmits, Port C receives) ? Clock frequencies up to 67 MHz (10 ns access time) Free-running clock lines for each port: CLKA, CLKB and CLKC, m

文件：570.92 Kbytes 頁數(shù)：27 Pages

RENESAS

瑞薩

CMOS TRIPLE BUS SyncFIFO? WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2

? Two independent FIFOs (64 X 36 storage capacity each) buffer data between bidirectional 36-bit port A and two unidirectional 18/9-bit ports (Port B transmits, Port C receives) ? Clock frequencies up to 67 MHz (10 ns access time) Free-running clock lines for each port: CLKA, CLKB and CLKC, m

文件：570.92 Kbytes 頁數(shù)：27 Pages

RENESAS

瑞薩

CMOS SyncBiFIFOTM 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2

? Memory storage capacity: IDT723622 – 256 x 36 x 2 IDT723632 – 512 x 36 x 2 IDT723642 – 1,024 x 36 x 2 ? Free-running CLKA and CLKB may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) ? Two independent clocked FIFOs buffering dat

文件：370.46 Kbytes 頁數(shù)：25 Pages

RENESAS

瑞薩

CMOS SyncBiFIFOTM 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2

? Memory storage capacity: IDT723622 – 256 x 36 x 2 IDT723632 – 512 x 36 x 2 IDT723642 – 1,024 x 36 x 2 ? Free-running CLKA and CLKB may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) ? Two independent clocked FIFOs buffering dat

文件：370.46 Kbytes 頁數(shù)：25 Pages

RENESAS

瑞薩

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

? Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 ? Clocked FIFO buffering data from Port A to Port B ? Clock frequencies up to 83 MHz (8 ns access time) ? IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

文件：377.96 Kbytes 頁數(shù)：29 Pages

RENESAS

瑞薩

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

? Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 ? Clocked FIFO buffering data from Port A to Port B ? Clock frequencies up to 83 MHz (8 ns access time) ? IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

文件：377.96 Kbytes 頁數(shù)：29 Pages

RENESAS

瑞薩

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

? Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 ? Clocked FIFO buffering data from Port A to Port B ? Clock frequencies up to 83 MHz (8 ns access time) ? IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

文件：377.96 Kbytes 頁數(shù)：29 Pages

RENESAS

瑞薩

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

? Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 ? Clocked FIFO buffering data from Port A to Port B ? Clock frequencies up to 83 MHz (8 ns access time) ? IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

文件：377.96 Kbytes 頁數(shù)：29 Pages

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