CMOS SyncFIFOTM

? Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) ? 64 x 36 storage capacity ? Synchronous data buffering from Port A to Port B ? Mailbox bypass register in each direction ? Programmable Almost-Full (AF) a

文件：527.78 Kbytes 頁數(shù)：21 Pages

RENESAS

瑞薩

CMOS SyncFIFOTM

? Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) ? 64 x 36 storage capacity ? Synchronous data buffering from Port A to Port B ? Mailbox bypass register in each direction ? Programmable Almost-Full (AF) a

文件：527.78 Kbytes 頁數(shù)：21 Pages

RENESAS

瑞薩

CMOS SyncFIFOTM

? Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) ? 64 x 36 storage capacity ? Synchronous data buffering from Port A to Port B ? Mailbox bypass register in each direction ? Programmable Almost-Full (AF) a

文件：527.78 Kbytes 頁數(shù)：21 Pages

RENESAS

瑞薩

CMOS SyncFIFOTM

? Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) ? 64 x 36 storage capacity ? Synchronous data buffering from Port A to Port B ? Mailbox bypass register in each direction ? Programmable Almost-Full (AF) a

文件：527.78 Kbytes 頁數(shù)：21 Pages

RENESAS

瑞薩

CMOS SyncBiFIFOTM 64 x 36 x 2

? Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) ? Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions ? Mailbox bypass Register for each FIFO ? Progra

文件：611.36 Kbytes 頁數(shù)：26 Pages

RENESAS

瑞薩

CMOS SyncBiFIFOTM 64 x 36 x 2

? Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) ? Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions ? Mailbox bypass Register for each FIFO ? Progra

文件：611.36 Kbytes 頁數(shù)：26 Pages

RENESAS

瑞薩

CMOS SyncBiFIFOTM 64 x 36 x 2

? Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) ? Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions ? Mailbox bypass Register for each FIFO ? Progra

文件：611.36 Kbytes 頁數(shù)：26 Pages

RENESAS

瑞薩

CMOS SyncBiFIFOTM 64 x 36 x 2

? Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) ? Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions ? Mailbox bypass Register for each FIFO ? Progra

文件：611.36 Kbytes 頁數(shù)：26 Pages

RENESAS

瑞薩

CMOS SyncBiFIFOTM 64 x 36 x 2

? Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) ? Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions ? Mailbox bypass Register for each FIFO ? Progra

文件：611.36 Kbytes 頁數(shù)：26 Pages

RENESAS

瑞薩

CMOS SyncBiFIFOTM 64 x 36 x 2

? Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) ? Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions ? Mailbox bypass Register for each FIFO ? Progra

文件：611.36 Kbytes 頁數(shù)：26 Pages

RENESAS

瑞薩