TAC5412-Q1 Automotive Low Power Stereo Audio Codec with integrated programmable boost, micbias and diagnostics

1 Features ? AEC-Q100 qualified for automotive applications – Temperature grade 1: –40°C ≤ TA ≤ +125°C ? ADC Channel – Performance: ? Line differential input dynamic range: 108dB ? Mic differential input dynamic range: 108dB ? THD+N: –95dB ? Channel summing mode supports high SNR – Input

文件：5.8288 Mbytes 頁數(shù)：206 Pages

TI

德州儀器

TAC5412-Q1 Automotive Stereo Audio Codec with 112dB ADC, 120dB DAC, High- Voltage Input, Micbias and Diagnostics

1 Features ? AEC-Q100 qualified for automotive applications – Temperature grade 1: –40°C ≤ TA ≤ +125°C ? Stereo audio ADC channel – Performance: ? Line/Microphone differential input dynamic range: 112dB ? Differential input THD+N: –99dB ? Channel summing mode supports high SNR: 114dB – I

文件：11.14466 Mbytes 頁數(shù)：245 Pages

TI

德州儀器

24-BIT DIGITAL SIGNAL PROCESSOR

FEATURES High-Performance DSP56300 Core ￥ 100 million instructions per second (MIPS) with a 100 MHz clock at 2.5 V core and 3.3 V I/O ￥ Object code compatible with the DSP56000 core ￥ Highly parallel instruction set ￥ Data arithmetic logic unit (ALU) D Fully pipelined 24 x 24-bit parallel m

文件：1.83703 Mbytes 頁數(shù)：156 Pages

恩XP

24-Bit Digital Signal Processor

Features 100 million multiply-accumulates per second (MMACS) with a 100 MHz clock at 3.3 V nominal Data arithmetic logic unit (Data ALU) with fully pipelined 24 × 24-bit parallel multiplier-accumulator (MAC), 56-bit parallel barrel shifter (fast shift and normalization; bit stream generation an

文件：2.35451 Mbytes 頁數(shù)：108 Pages

恩XP

24-Bit Digital Signal Processor

24-Bit Digital Signal Processor The DSP56309 is a member of the DSP56300 core family of programmable CMOS DSPs. The DSP56300 core includes a barrel shifter, 24-bit addressing, an instruction cache, and direct memory access (DMA). The DSP56309 offers 100 MMACS at 3.0–3.6 V using an inter

文件：1.90848 Mbytes 頁數(shù)：108 Pages

FREESCALEFreescale Semiconductor, Inc

飛思卡爾飛思卡爾半導(dǎo)體

24-Bit Digital Signal Processor

24-Bit Digital Signal Processor The DSP56309 is a member of the DSP56300 core family of programmable CMOS DSPs. The DSP56300 core includes a barrel shifter, 24-bit addressing, an instruction cache, and direct memory access (DMA). The DSP56309 offers 100 MMACS at 3.0–3.6 V using an inter

文件：1.90848 Mbytes 頁數(shù)：108 Pages

FREESCALEFreescale Semiconductor, Inc

飛思卡爾飛思卡爾半導(dǎo)體

24-Bit Digital Signal Processor

Features 100 million multiply-accumulates per second (MMACS) with a 100 MHz clock at 3.3 V nominal Data arithmetic logic unit (Data ALU) with fully pipelined 24 × 24-bit parallel multiplier-accumulator (MAC), 56-bit parallel barrel shifter (fast shift and normalization; bit stream generation an

文件：2.35451 Mbytes 頁數(shù)：108 Pages

恩XP

24-Bit Digital Signal Processor

Features 100 million multiply-accumulates per second (MMACS) with a 100 MHz clock at 3.3 V nominal Data arithmetic logic unit (Data ALU) with fully pipelined 24 × 24-bit parallel multiplier-accumulator (MAC), 56-bit parallel barrel shifter (fast shift and normalization; bit stream generation an

文件：2.35451 Mbytes 頁數(shù)：108 Pages

恩XP

24-Bit Digital Signal Processor

24-Bit Digital Signal Processor The DSP56309 is a member of the DSP56300 core family of programmable CMOS DSPs. The DSP56300 core includes a barrel shifter, 24-bit addressing, an instruction cache, and direct memory access (DMA). The DSP56309 offers 100 MMACS at 3.0–3.6 V using an inter

文件：1.90848 Mbytes 頁數(shù)：108 Pages

FREESCALEFreescale Semiconductor, Inc

飛思卡爾飛思卡爾半導(dǎo)體

24-Bit Digital Signal Processor

24-Bit Digital Signal Processor The DSP56309 is a member of the DSP56300 core family of programmable CMOS DSPs. The DSP56300 core includes a barrel shifter, 24-bit addressing, an instruction cache, and direct memory access (DMA). The DSP56309 offers 100 MMACS at 3.0–3.6 V using an inter

文件：1.90848 Mbytes 頁數(shù)：108 Pages

FREESCALEFreescale Semiconductor, Inc

飛思卡爾飛思卡爾半導(dǎo)體