| 型號 | 下載 訂購 | 功能描述 | 制造商 上傳企業(yè) | LOGO |
|---|---|---|---|---|
UR5596 | MOS IC DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2(Stub-Series Terminated Logic) specifications for termination of DDR-SDRAM. It also can be used in SSTL-3 or HSTL (High-Speed Transceiver Logic) scheme. The device contains a high-speed OP AMP to pro 文件：202.38 Kbytes 頁數(shù)：11 Pages | UTC 友順 | UTC | |
UR5596 | DDR TERMINATION REGULATOR DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2(Stub-Series Terminated Logic) specifications for termination of DDR-SDRAM. It also can be used in SSTL-3 or HSTL (High-Speed Transceiver Logic) scheme. The device contains a high-speed OP AMP to pro 文件：260.089 Kbytes 頁數(shù)：11 Pages | UTC 友順 | UTC | |
UR5596 | DDR TERMINATION REGULATOR 文件：218.33 Kbytes 頁數(shù)：12 Pages | ETL 亞歷電子 | ETL | |
UR5596 | DDR TERMINATION REGULATOR 文件：219.14 Kbytes 頁數(shù)：12 Pages | UTC 友順 | UTC | |
UR5596 | DDR TERMINATION REGULATOR The UTC?UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2(Stub-Series Terminated Logic) specifications for termination of DDR-SDRAM. It also can be used in SSTL-3 or HSTL (High-Speed Transceiver Logic) scheme. The device contains a?high-speed OP AMP to provideexcellent r ? Source and sink current \n? Low output voltage offset \n? No external resistors required \n? Linear topology \n? Suspend To Ram (STR) functionality \n? Low external component count \n? Thermal shutdown protection; | UTC 友順 | UTC | |
DDR TERMINATION REGULATOR DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2(Stub-Series Terminated Logic) specifications for termination of DDR-SDRAM. It also can be used in SSTL-3 or HSTL (High-Speed Transceiver Logic) scheme. The device contains a high-speed OP AMP to pro 文件：260.089 Kbytes 頁數(shù)：11 Pages | UTC 友順 | UTC | ||
DDR TERMINATION REGULATOR DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2(Stub-Series Terminated Logic) specifications for termination of DDR-SDRAM. It also can be used in SSTL-3 or HSTL (High-Speed Transceiver Logic) scheme. The device contains a high-speed OP AMP to pro 文件：260.089 Kbytes 頁數(shù)：11 Pages | UTC 友順 | UTC | ||
DDR TERMINATION REGULATOR DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2(Stub-Series Terminated Logic) specifications for termination of DDR-SDRAM. It also can be used in SSTL-3 or HSTL (High-Speed Transceiver Logic) scheme. The device contains a high-speed OP AMP to pro 文件：260.089 Kbytes 頁數(shù)：11 Pages | UTC 友順 | UTC | ||
MOS IC DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2(Stub-Series Terminated Logic) specifications for termination of DDR-SDRAM. It also can be used in SSTL-3 or HSTL (High-Speed Transceiver Logic) scheme. The device contains a high-speed OP AMP to pro 文件：202.38 Kbytes 頁數(shù)：11 Pages | UTC 友順 | UTC | ||
MOS IC DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2(Stub-Series Terminated Logic) specifications for termination of DDR-SDRAM. It also can be used in SSTL-3 or HSTL (High-Speed Transceiver Logic) scheme. The device contains a high-speed OP AMP to pro 文件：202.38 Kbytes 頁數(shù)：11 Pages | UTC 友順 | UTC |
技術(shù)參數(shù)
- Vin(Range)：
2.2V~5.5V
- Vref(Typ)：
0.9V or 1.25V
- Iout：
1.5A
- package：
SOP-8HSOP-8
| 供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
25+ |
SOP |
6500 |
百分百原裝正品 真實公司現(xiàn)貨庫存 本公司只做原裝 可 |
詢價 | |||
UTC |
25+ |
SOP8 |
14700 |
普通 |
詢價 | ||
UTC |
24+ |
SOP8管裝 |
6000 |
深圳原裝現(xiàn)貨價格優(yōu)勢 |
詢價 | ||
UTC |
23+ |
SOP8 |
5000 |
原裝正品,假一罰十 |
詢價 | ||
UTC |
2016+ |
SOP8 |
4262 |
只做原裝,假一罰十,公司可開17%增值稅發(fā)票! |
詢價 | ||
UTC/友順 |
25+ |
SOP8 |
15000 |
全新原裝現(xiàn)貨,價格優(yōu)勢 |
詢價 | ||
UTC/友順 |
24+ |
SOP-8 |
9600 |
原裝現(xiàn)貨,優(yōu)勢供應,支持實單! |
詢價 | ||
UTC |
23+ |
SOP8 |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價 | ||
UTC/友順 |
23+ |
SOP-8 |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價 | ||
UTC |
25+ |
2 |
公司優(yōu)勢庫存 熱賣中! |
詢價 |
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