3-MICROON CMOS GATE ARRAYS

Description The μD65000 (CMOS-2) series of gate arrays are low-power, high-speed devices featuring 3-micron silicon gate CMOS technology. The basic cell on the chip consists of four transistors, two P-channel and two N-channel, with double-layer metal Interconnects. Features

文件：658.41 Kbytes 頁數(shù)：11 Pages

NEC

瑞薩

20 (10/30) AWG Bare Copper

文件：407.88 Kbytes 頁數(shù)：4 Pages

ALPHAWIRE

1-pole/2-pole 16A polarized power relays Variety of contact arrangements

FEATURES 1. Variety of contact arrangements Wide lineup of 1 Form C, 1 Form A, 1 Form B, 2 Form C, 2 Form A, 2 Form B, 1 Form A 1 Form B. 2. Latching operation Latching via a polarized magnetic circuit structure allows remote operation and lower energy consumption 3. Compact with high c

文件：142.7 Kbytes 頁數(shù)：9 Pages

PANASONIC

松下

Voltage Mode Synchronous PWM Buck Regulator

文件：1.16524 Mbytes 頁數(shù)：26 Pages

ONSEMI

安森美半導體