BIPOLAR ANALOG INTEGRATED CIRCUIT

FEATURES ? Stable operation with 220 pF capacitive load ? Low input offset voltage and offset voltage null capability ±2.5 mV (MAX.) ±7 mV/°C (TYP.) temperature drift ? Very low input bias and offset currents

文件：290.91 Kbytes 頁數(shù)：14 Pages

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J-FET INPUT LOW-OFFSET OPERATIONAL AMPLIFIER

文件：90.69 Kbytes 頁數(shù)：12 Pages

NEC

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J-FET INPUT LOW-OFFSET OPERATIONAL AMPLIFIER

The μPC4093 operational amplifier is a high-speed version of the μPC4091. NEC's unique high-speed PNP transistor (fT= 300 MHz) in the output stage realizes a high slew rate of 25 V/μs under voltage-follower conditions without an oscillation problem. Zener-zap resistor trimming in the input stage pro ? Stable operation with 220 pF capacitive load\n? Low input offset voltage and offset voltage null capability ±2.5 mV (MAX.) ±7 μV/°C (TYP.) temperature drift\n? Very low input bias and offset currents\n? Low noise : en= 19 nV/ √Hz (TYP.)\n? Output short circuit protection\n? High input impedance ..;

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BIPOLAR ANALOG INTEGRATED CIRCUIT

FEATURES ? Stable operation with 220 pF capacitive load ? Low input offset voltage and offset voltage null capability ±2.5 mV (MAX.) ±7 mV/°C (TYP.) temperature drift ? Very low input bias and offset currents

文件：290.91 Kbytes 頁數(shù)：14 Pages

RENESAS

瑞薩

BIPOLAR ANALOG INTEGRATED CIRCUIT

FEATURES ? Stable operation with 220 pF capacitive load ? Low input offset voltage and offset voltage null capability ±2.5 mV (MAX.) ±7 mV/°C (TYP.) temperature drift ? Very low input bias and offset currents

文件：290.91 Kbytes 頁數(shù)：14 Pages

RENESAS

瑞薩

J-FET INPUT LOW-OFFSET OPERATIONAL AMPLIFIER

文件：90.69 Kbytes 頁數(shù)：12 Pages

NEC

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J-FET INPUT LOW-OFFSET OPERATIONAL AMPLIFIER

文件：90.69 Kbytes 頁數(shù)：12 Pages

NEC

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General-purpose Linear-Operational Amplifiers (op-amp)

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General-purpose Linear-Operational Amplifiers (op-amp)

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