NECs LOW POWER GPS RF RECEIVER

DESCRIPTION The μPB1008K is a silicon monolithic integrated circuit for GPS receiver. This IC is designed as double conversion RF block integrated Pre-Amplifier + RF/IF down-converter + PLL frequency synthesizer on 1 chip. This IC has IQ recovery function, builds a 2-bit A/D converter in both I

文件：281.95 Kbytes 頁數(shù)：9 Pages

NEC

瑞薩

NECs LOW POWER GPS RF RECEIVER

Renesas

瑞薩

NECs LOW POWER GPS RF RECEIVER

DESCRIPTION The μPB1008K is a silicon monolithic integrated circuit for GPS receiver. This IC is designed as double conversion RF block integrated Pre-Amplifier + RF/IF down-converter + PLL frequency synthesizer on 1 chip. This IC has IQ recovery function, builds a 2-bit A/D converter in both I

文件：281.95 Kbytes 頁數(shù)：9 Pages

NEC

瑞薩

BIPOLAR ANALOG DIGITAL INTEGRATED CIRCUIT

FEATURES ? Double conversion : fREFin = 27.456 MHz, f1stIFin = 175.164 MHz, f2ndIFin = 132 kHz ? Integrated RF block : Pre-Amplifier + RF/IF frequency down-converter + PLL frequency synthesizer : The 2-bit A/D converter is unified to single chip. ? Needless to input counter data : fixed divisi

文件：367.17 Kbytes 頁數(shù)：27 Pages

RENESAS

瑞薩

BIPOLAR ANALOG DIGITAL INTEGRATED CIRCUIT

FEATURES ? Double conversion : fREFin = 27.456 MHz, f1stIFin = 175.164 MHz, f2ndIFin = 132 kHz ? Integrated RF block : Pre-Amplifier + RF/IF frequency down-converter + PLL frequency synthesizer : The 2-bit A/D converter is unified to single chip. ? Needless to input counter data : fixed divisi

文件：367.17 Kbytes 頁數(shù)：27 Pages

RENESAS

瑞薩

LOW POWER GPS RF RECEIVER

文件：440.02 Kbytes 頁數(shù)：10 Pages

CEL

LOW POWER GPS RF RECEIVER

文件：440.02 Kbytes 頁數(shù)：10 Pages

CEL

LOW POWER GPS RF RECEIVER

CEL

Package：36-VFQFN；包裝：托盤 類別：RF/IF，射頻/中頻和 RFID 射頻接收器 描述：RF RECEIVER GPS 1575.42MHZ 36QFN

CEL

Package：36-VFQFN；包裝：托盤 類別：RF/IF，射頻/中頻和 RFID 射頻接收器 描述：RF RECEIVER GPS 1575.42MHZ 36QFN

CEL