絲印：UEN；Package：DSBGA；SN74AUC1G08 Single 2-Input Positive-AND Gate

1 Features 1? Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ? ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) ? Available in the Texas Instruments NanoFree? Package ? Optimized for 1.8-V Oper

文件：913.54 Kbytes 頁數(shù)：25 Pages

TI

德州儀器

絲?。?strong>UEN；Package：DSBGA；SN74AUC1G08 Single 2-Input Positive-AND Gate

1 Features 1? Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ? ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) ? Available in the Texas Instruments NanoFree? Package ? Optimized for 1.8-V Oper

文件：913.54 Kbytes 頁數(shù)：25 Pages

TI

德州儀器

絲?。?strong>UEN；Package：DSBGA；DUAL 2-INPUT POSITIVE-AND GATE

FEATURES · Available in the Texas Instruments NanoFree? Package · Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation · Ioff Supports Partial-Power-Down Mode Operation · Sub-1-V Operable · Max tpd of 1.5 ns at 1.8 V · Low Power Consumption, 10-m

文件：637.46 Kbytes 頁數(shù)：19 Pages

TI

德州儀器

絲?。?strong>UEN；Package：DSBGA；DUAL 2-INPUT POSITIVE-AND GATE

FEATURES · Available in the Texas Instruments NanoFree? Package · Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation · Ioff Supports Partial-Power-Down Mode Operation · Sub-1-V Operable · Max tpd of 1.5 ns at 1.8 V · Low Power Consumption, 10-m

文件：637.46 Kbytes 頁數(shù)：19 Pages

TI

德州儀器