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                >TL16C554>規(guī)格書列表
                
    
            
    
                
    
                    
    型號下載 訂購功能描述制造商 上傳企業(yè)LOGO
    
                    
    TL16C554
    ASYNCHRONOUS COMMUNICATIONS ELEMENT
    
Integrated Asynchronous Communications
Element
Consists of Four Improved TL16C550 ACEs
Plus Steering Logic
In FIFO Mode, Each ACE Transmitter and
Receiver Is Buffered With 16-Byte FIFO to
Reduce the Number of Interrupts to CPU
In TL16C450 Mode, Hold and Shift
Registers Eliminate Need for P
    文件：523.549 Kbytes 頁數(shù)：35 Pages
    TI
    德州儀器
    

    TL16C554
    ASYNCHRONOUS COMMUNICATIONS ELEMENT
    文件：478.4 Kbytes 頁數(shù)：33 Pages
    TI
    德州儀器
    

    TL16C554
    ASYNCHRONOUS COMMUNICATIONS ELEMENT
    文件：589.75 Kbytes 頁數(shù)：35 Pages
    TI
    德州儀器
    

    TL16C554
    具有 16 字節(jié) FIFO 的四路 UART
    The TL16C554 and the TL16C554I are enhanced quadruple versions of the TL16C550B asynchronous communications element (ACE). Each channel performs serial-to-parallel conversion on data characters received from peripheral devices or modems and parallel-to-serial conversion on data characters transmitte  ? Integrated Asynchronous Communications Element\n? In FIFO Mode, Each ACE Transmitter and Receiver Is Buffered With 16-Byte FIFO to Reduce the Number of Interrupts to CPU\n? Up to 16-MHz Clock Rate for up to 1-Mbaud Operation\n? Adds or Deletes Standard Asynchronous Communication Bits (Start, Stop,;
    TI
    德州儀器
    

    TL16C5541
    ASYNCHRONOUS COMMUNICATIONS ELEMENT
    
Integrated Asynchronous Communications
Element
Consists of Four Improved TL16C550 ACEs
Plus Steering Logic
In FIFO Mode, Each ACE Transmitter and
Receiver Is Buffered With 16-Byte FIFO to
Reduce the Number of Interrupts to CPU
In TL16C450 Mode, Hold and Shift
Registers Eliminate Need for P
    文件：523.549 Kbytes 頁數(shù)：35 Pages
    TI
    德州儀器
    

    TL16C554FN
    絲?。?a target="_blank" title="Marking" href="/tl16c554fn/marking.html">TL16C554FN；Package：PLCC；ASYNCHRONOUS COMMUNICATIONS ELEMENT
    
Integrated Asynchronous Communications
Element
Consists of Four Improved TL16C550 ACEs
Plus Steering Logic
In FIFO Mode, Each ACE Transmitter and
Receiver Is Buffered With 16-Byte FIFO to
Reduce the Number of Interrupts to CPU
In TL16C450 Mode, Hold and Shift
Registers Eliminate Need for P
    文件：523.549 Kbytes 頁數(shù)：35 Pages
    TI
    德州儀器
    

    TL16C554FN.A
    絲?。?a target="_blank" title="Marking" href="/tl16c554fn/marking.html">TL16C554FN；Package：PLCC；ASYNCHRONOUS COMMUNICATIONS ELEMENT
    
Integrated Asynchronous Communications
Element
Consists of Four Improved TL16C550 ACEs
Plus Steering Logic
In FIFO Mode, Each ACE Transmitter and
Receiver Is Buffered With 16-Byte FIFO to
Reduce the Number of Interrupts to CPU
In TL16C450 Mode, Hold and Shift
Registers Eliminate Need for P
    文件：523.549 Kbytes 頁數(shù)：35 Pages
    TI
    德州儀器
    

    TL16C554FNR
    絲?。?a target="_blank" title="Marking" href="/tl16c554fn/marking.html">TL16C554FN；Package：PLCC；ASYNCHRONOUS COMMUNICATIONS ELEMENT
    
Integrated Asynchronous Communications
Element
Consists of Four Improved TL16C550 ACEs
Plus Steering Logic
In FIFO Mode, Each ACE Transmitter and
Receiver Is Buffered With 16-Byte FIFO to
Reduce the Number of Interrupts to CPU
In TL16C450 Mode, Hold and Shift
Registers Eliminate Need for P
    文件：523.549 Kbytes 頁數(shù)：35 Pages
    TI
    德州儀器
    

    TL16C554FNR.A
    絲?。?a target="_blank" title="Marking" href="/tl16c554fn/marking.html">TL16C554FN；Package：PLCC；ASYNCHRONOUS COMMUNICATIONS ELEMENT
    
Integrated Asynchronous Communications
Element
Consists of Four Improved TL16C550 ACEs
Plus Steering Logic
In FIFO Mode, Each ACE Transmitter and
Receiver Is Buffered With 16-Byte FIFO to
Reduce the Number of Interrupts to CPU
In TL16C450 Mode, Hold and Shift
Registers Eliminate Need for P
    文件：523.549 Kbytes 頁數(shù)：35 Pages
    TI
    德州儀器
    

    TL16C554IFN
    絲印：TL16C554IFN；Package：PLCC；ASYNCHRONOUS COMMUNICATIONS ELEMENT
    
Integrated Asynchronous Communications
Element
Consists of Four Improved TL16C550 ACEs
Plus Steering Logic
In FIFO Mode, Each ACE Transmitter and
Receiver Is Buffered With 16-Byte FIFO to
Reduce the Number of Interrupts to CPU
In TL16C450 Mode, Hold and Shift
Registers Eliminate Need for P
    文件：523.549 Kbytes 頁數(shù)：35 Pages
    TI
    德州儀器
    

    
            
    
		
        
    
            
    
                
    技術(shù)參數(shù)
    
            
    
            
      
            	
    • FIFOs(bytes)：
      16
    • Rx FIFO trigger levels(#)：
      4
    • Programmable FIFO trigger levels：
      No
    • CPU interface：
      X86
    • Baud rate (max) at Vcc = 5.0 V & with 16X sampling(Mbps)：
      1
    • Operating voltage(V)：
      5
    • Auto RTS/CTS：
      No
    • Rating：
      Catalog
    • Operating temperature range(C)：
      -40 to 850 to 70
    • Package Group：
      LQFP
    
            
    
        
    
            
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