Baseband delay line

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PHI

PHI

I2C-bus controlled PAL/NTSC TV processors

GENERAL DESCRIPTION\nThe TDA8376 and TDA8376A are alignment-free I2C-bus controlled video processors which contain a PAL/NTSC colour decoder, luminance processor, sync processor, RGB-control and deflection processor. The circuits have been designed for use with the baseband chrominance\ndelay line T ? Source selection with 2 CVBS inputs and a Y/C (or extra CVBS) input\n? Output signals of the video switch circuit for the teletext decoder and a Picture-In-Picture (PIP) processor\n? Video identification circuit which is independent of the synchronization for stable On Screen Display (OSD) under ‘;

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Baseband delay line

文件：114.18 Kbytes 頁(yè)數(shù)：12 Pages

PHI

PHI

Baseband delay line

GENERAL DESCRIPTION\nThe TDA4665 is an integrated baseband delay line circuit with one line delay. It is suitable for decoders with colour-difference signal outputs±(R?Y) and ±(B?Y).FEATURES\n? Two comb filters, using the switched-capacitor technique, for one line delay time (64μs)\n? Adjustment-fre ? Two comb filters, using the switched-capacitor technique, for one line delay time (64μs)\n? Adjustment-free application\n? No crosstalk between SECAM colour carriers (diaphoty)\n? Handles negative or positive colour-difference input signals\n? Clamping of AC-coupled input signals (±(R?Y) and ±(B?Y;

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TDA4665T

Overview

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