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                >SY10E451>規(guī)格書列表
                
    
            
    
                
    
                    
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    SY10E451
    6-BIT REGISTER DIFFERENTIAL DATA CLOCK
    
DESCRIPTION
The SY10/100E451 offer six D-type flip-flops with single-ended outputs and differential data and clock inputs, designed for use in new, high-performance ECL systems. The registers are triggered by the rising edge of the CLK input.
FEATURES
■ 1100MHz min. toggle frequency
■ Extended
    文件：63.13 Kbytes 頁(yè)數(shù)：4 Pages
    MICREL
    麥瑞半導(dǎo)體
    

    SY10E451
    6-BIT REGISTER DIFFERENTIAL DATA CLOCK
    文件：63.57 Kbytes 頁(yè)數(shù)：4 Pages
    MICREL
    麥瑞半導(dǎo)體
    

    SY10E451
    Flip Flops, Registers Products
    The SY10/100E451 offer six D-type flip-flops with single ended outputs and differential data and clock inputs, designed for use in new, high-performance ECL systems.The registers are triggered by the rising edge of the CLK input. A logic HIGH on the Master Reset (MR) input resets all outputs to a lo  ·1100MHz min. toggle frequency\n·Extended 100E VEE?range of -4.2V to -5.5V\n·Differential inputs: data and clock\n·VBB?output for single-ended use\n·Asynchronous Master Reset\n·Fully compatible with industry standard 10KH, 100K ECL levels\n·Internal 75KΩ input pulldown resistors\n·Fully compatible w;
    Microchip
    微芯科技
    

    SY10E451JC
    6-BIT REGISTER DIFFERENTIAL DATA CLOCK
    
DESCRIPTION
The SY10/100E451 offer six D-type flip-flops with single-ended outputs and differential data and clock inputs, designed for use in new, high-performance ECL systems. The registers are triggered by the rising edge of the CLK input.
FEATURES
■ 1100MHz min. toggle frequency
■ Extended
    文件：63.13 Kbytes 頁(yè)數(shù)：4 Pages
    MICREL
    麥瑞半導(dǎo)體
    

    SY10E451JCTR
    6-BIT REGISTER DIFFERENTIAL DATA CLOCK
    
DESCRIPTION
The SY10/100E451 offer six D-type flip-flops with single-ended outputs and differential data and clock inputs, designed for use in new, high-performance ECL systems. The registers are triggered by the rising edge of the CLK input.
FEATURES
■ 1100MHz min. toggle frequency
■ Extended
    文件：63.13 Kbytes 頁(yè)數(shù)：4 Pages
    MICREL
    麥瑞半導(dǎo)體
    

    SY10E451_06
    6-BIT REGISTER DIFFERENTIAL DATA CLOCK
    文件：63.57 Kbytes 頁(yè)數(shù)：4 Pages
    MICREL
    麥瑞半導(dǎo)體
    

    SY10E451JC
    6-BIT REGISTER DIFFERENTIAL DATA CLOCK
    文件：63.57 Kbytes 頁(yè)數(shù)：4 Pages
    MICREL
    麥瑞半導(dǎo)體
    

    SY10E451JCTR
    6-BIT REGISTER DIFFERENTIAL DATA CLOCK
    文件：63.57 Kbytes 頁(yè)數(shù)：4 Pages
    MICREL
    麥瑞半導(dǎo)體
    

    SY10E451JI
    6-BIT REGISTER DIFFERENTIAL DATA CLOCK
    文件：63.57 Kbytes 頁(yè)數(shù)：4 Pages
    MICREL
    麥瑞半導(dǎo)體
    

    SY10E451JITR
    6-BIT REGISTER DIFFERENTIAL DATA CLOCK
    文件：63.57 Kbytes 頁(yè)數(shù)：4 Pages
    MICREL
    麥瑞半導(dǎo)體
    

    
            
    
		
        
    
            
    
                
    技術(shù)參數(shù)
    
            
    
            
      
            	
    • Input：
      PECL
    • Supply Voltage：
      5
    • Max Freq (GHz)：
      0.75
    • Icc (mA)：
      25
    • OE：
      True
    • RPE：
      False
    • FSI：
      False
    • Input Mux：
      True
    • Input EQ：
      False
    • Output Type：
      PECL
    • Output Voltage：
      3.3V
    
            
    
        
    
            
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            更新時(shí)間2026-1-23 11:02:00
        
    
        
    
          
    
            
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