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          首頁
                >SY10E151>規(guī)格書列表
                
          
            
          
                
          
                    
          型號下載 訂購功能描述制造商 上傳企業(yè)LOGO
          
                    
          SY10E151
          6-BIT D REGISTER
          
DESCRIPTION
The SY10/100E151 offer 6 edge-triggered, high-speed, master-slave D-type flip-flops with differential outputs, designed for use in new, high-performance ECL systems. The two external clock signals (CLK1, CLK2) are gated through a logical OR operation before use as clocking control for
          文件：66.31 Kbytes 頁數：4 Pages
          MICREL
          麥瑞半導體
          

          SY10E151
          6-BIT D REGISTER
          文件：63.16 Kbytes 頁數：4 Pages
          MICREL
          麥瑞半導體
          

          SY10E151
          6-BIT D REGISTER
          文件：64.129 Kbytes 頁數：4 Pages
          MICREL
          麥瑞半導體
          

          SY10E151
          Flip Flops, Registers Products
          The SY10/100E151 offer 6 edge-triggered, high-speed, master-slave D-type flip-flops with differential outputs, designed for use in new, high-performance ECL systems.The two external clock signals (CLK1, CLK2) are gated through a logical OR operation before use as clocking control for the flip-flops.  ·1100MHz toggle frequency\n·Extended 100E VEE?range of -4.2V to -5.46V\n·Differential outputs\n·Asynchronous Master Reset\n·Dual clocks\n·Fully compatible with industry standard 10KH, 100K ECL levels\n·Internal 75KΩ input pulldown resistors\n·Fully compatible with Motorola MC10E/100E151\n·Available ;
          Microchip
          微芯科技
          

          SY10E151JC
          6-BIT D REGISTER
          
DESCRIPTION
The SY10/100E151 offer 6 edge-triggered, high-speed, master-slave D-type flip-flops with differential outputs, designed for use in new, high-performance ECL systems. The two external clock signals (CLK1, CLK2) are gated through a logical OR operation before use as clocking control for
          文件：66.31 Kbytes 頁數：4 Pages
          MICREL
          麥瑞半導體
          

          SY10E151JCTR
          6-BIT D REGISTER
          
DESCRIPTION
The SY10/100E151 offer 6 edge-triggered, high-speed, master-slave D-type flip-flops with differential outputs, designed for use in new, high-performance ECL systems. The two external clock signals (CLK1, CLK2) are gated through a logical OR operation before use as clocking control for
          文件：66.31 Kbytes 頁數：4 Pages
          MICREL
          麥瑞半導體
          

          SY10E151JI
          6-BIT D REGISTER
          
DESCRIPTION
The SY10/100E151 offer 6 edge-triggered, high-speed, master-slave D-type flip-flops with differential outputs, designed for use in new, high-performance ECL systems. The two external clock signals (CLK1, CLK2) are gated through a logical OR operation before use as clocking control for
          文件：66.31 Kbytes 頁數：4 Pages
          MICREL
          麥瑞半導體
          

          SY10E151JITR
          6-BIT D REGISTER
          
DESCRIPTION
The SY10/100E151 offer 6 edge-triggered, high-speed, master-slave D-type flip-flops with differential outputs, designed for use in new, high-performance ECL systems. The two external clock signals (CLK1, CLK2) are gated through a logical OR operation before use as clocking control for
          文件：66.31 Kbytes 頁數：4 Pages
          MICREL
          麥瑞半導體
          

          SY10E151_06
          6-BIT D REGISTER
          文件：63.16 Kbytes 頁數：4 Pages
          MICREL
          麥瑞半導體
          

          SY10E151_08
          6-BIT D REGISTER
          文件：64.129 Kbytes 頁數：4 Pages
          MICREL
          麥瑞半導體
          

          
            
          
		
        
          
            
          
                
          技術參數
          
            
          
            
            
            	
          • Input：
            LVPECL
          • Supply Voltage：
            5
          • Max Freq (GHz)：
            2
          • Icc (mA)：
            75
          • OE：
            True
          • RPE：
            False
          • FSI：
            False
          • Input Mux：
            True
          • Input EQ：
            False
          • Output Type：
            LVPECL
          • Output Voltage：
            2.5/3.3V
          
            
          
        
          
            
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          更多SY10E151供應商
            更新時間2026-1-21 15:09:00
        
          
        
          
          
          
            
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