Accordo2 family – Automotive dual core processor for car radio and display audio application

Features ? AEC-Q100 qualified Core and infrastructure ? ARM Cortex-R4 MCU running at up to 600 MHz ? MCU memory organization – L1 Cache: 32K instruction, 32K data – 32 KB ITCM + 32 KB DTCM – 1.25 MB embedded SRAM – STA109x SDRAM controller: 16/32-bit data up to 166 MHz – STA108x SDRAM c

文件：1.6485 Mbytes 頁數(shù)：127 Pages

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Accordo2 family - Dual core processor for car radio and display audio applications

文件：253.78 Kbytes 頁數(shù)：13 Pages

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Accordo2雙核CortexR4/CortexM3處理器，具有用于汽車無線電應(yīng)用的嵌入式SRAM、集成DSP聲音子系統(tǒng)、音頻ADC和DAC

Accordo2 is a device that provides a cost effective microprocessor solution for modern automotive car radio systems, with an embedded powerful Digital Sound Processing subsystem, as well as a MIPS efficient ARM Cortex-R4 processor.\n\n In addition, an ARM Cortex-M3 controller is dedicated for real-t ? AEC-Q100 qualified \n?ARM Cortex-R4 MCU running at up to 600 MHz \n?MCU memory organization? L1 Cache: 32K instruction, 32K data\n? 1.25 MB embedded SRAM\n? STA108x SDRAM controller: 16-bit data up to 166 MHz\n? 16-bit parallel NAND/NOR controller\n?32-bit watchdog timer \n?16-channel DMA \n?8x 32;

ST

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Package：361-LFBGA；包裝：散裝 類別：集成電路（IC） 微處理器 描述：LFBGA16X16X1.7 361 F

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Package：361-LFBGA；包裝：散裝 類別：集成電路（IC） 微處理器 描述：ACCORDO2 DUAL CORE CORTEXR4/CORT

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