3-STATE HEX BUFFERS

3-STATE HEX BUFFERS These devices are high speed hex buffers with 3-state outputs. They are organized as single 6-bit or 2-bit/4-bit, with inverting or non-inverting data (D) paths. The outputs are designed to drive 15 TTL Unit Loads or 60 Low Power Schottky loads when the Enable (E) is LOW.

文件：148.01 Kbytes 頁數(shù)：5 Pages

MOTOROLA

摩托羅拉

3-STATE HEX BUFFERS

3-STATE HEX BUFFERS These devices are high speed hex buffers with 3-state outputs. They are organized as single 6-bit or 2-bit/4-bit, with inverting or non-inverting data (D) paths. The outputs are designed to drive 15 TTL Unit Loads or 60 Low Power Schottky loads when the Enable (E) is LOW.

文件：148.01 Kbytes 頁數(shù)：5 Pages

MOTOROLA

摩托羅拉

3-STATE HEX BUFFERS

DESCRIPTION These devices are high-speed Hex Buffers with 3- state outputs. They are organized as single 6-bit or 2-bit/4-bit, with inverting or non-inverting data (D) paths. The outputs are designed to drive 15 TTL Unit Loads or 60 Low Power Schottky loads when the Enable (E) is LOW. When

文件：87.15 Kbytes 頁數(shù)：4 Pages

STMICROELECTRONICS

意法半導(dǎo)體

Hex 3-STATE Buffer/Bus Driver

General Description This device contains six independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the d

文件：47.81 Kbytes 頁數(shù)：4 Pages

FAIRCHILD

仙童半導(dǎo)體

Hex 3-STATE Buffer/Bus Driver

General Description This device contains six independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the d

文件：47.81 Kbytes 頁數(shù)：4 Pages

FAIRCHILD

仙童半導(dǎo)體

Hex TRI-STATE Buffers

文件：131.22 Kbytes 頁數(shù)：6 Pages

NSC

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