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    首頁 >絲印反查>SN74LS240N

    型號(hào)下載 訂購功能描述制造商 上傳企業(yè)LOGO

    SN74LS240N

    絲?。?strong>SN74LS240N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

    1 Features 1? Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs ? Maximum tpd of 15 ns at 5 V ? 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers ? PNP Inputs Reduce DC Loading ? Hysteresis at Inputs Improves Noise Margins 2 Applications ? Servers

    文件:1.80265 Mbytes 頁數(shù):41 Pages

    TI

    德州儀器

    SN74LS240N

    絲印:SN74LS240N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

    1 Features 1? Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs ? Maximum tpd of 15 ns at 5 V ? 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers ? PNP Inputs Reduce DC Loading ? Hysteresis at Inputs Improves Noise Margins 2 Applications ? Servers

    文件:1.80212 Mbytes 頁數(shù):41 Pages

    TI

    德州儀器

    SN74LS240NE4

    絲?。?strong>SN74LS240N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

    1 Features 1? Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs ? Maximum tpd of 15 ns at 5 V ? 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers ? PNP Inputs Reduce DC Loading ? Hysteresis at Inputs Improves Noise Margins 2 Applications ? Servers

    文件:1.80212 Mbytes 頁數(shù):41 Pages

    TI

    德州儀器

    SN74LS240NE4

    絲印:SN74LS240N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

    1 Features 1? Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs ? Maximum tpd of 15 ns at 5 V ? 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers ? PNP Inputs Reduce DC Loading ? Hysteresis at Inputs Improves Noise Margins 2 Applications ? Servers

    文件:1.80265 Mbytes 頁數(shù):41 Pages

    TI

    德州儀器

    SN74LS240N

    絲?。?strong>SN74LS240N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

    1 Features 1? Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs ? Maximum tpd of 15 ns at 5 V ? 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers ? PNP Inputs Reduce DC Loading ? Hysteresis at Inputs Improves Noise Margins 2 Applications ? Servers

    文件:1.80265 Mbytes 頁數(shù):41 Pages

    TI

    德州儀器

    SN74LS240N

    絲印:SN74LS240N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

    1 Features 1? Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs ? Maximum tpd of 15 ns at 5 V ? 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers ? PNP Inputs Reduce DC Loading ? Hysteresis at Inputs Improves Noise Margins 2 Applications ? Servers

    文件:1.80212 Mbytes 頁數(shù):41 Pages

    TI

    德州儀器

    SN74LS240NE4

    絲?。?strong>SN74LS240N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

    1 Features 1? Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs ? Maximum tpd of 15 ns at 5 V ? 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers ? PNP Inputs Reduce DC Loading ? Hysteresis at Inputs Improves Noise Margins 2 Applications ? Servers

    文件:1.80212 Mbytes 頁數(shù):41 Pages

    TI

    德州儀器

    SN74LS240NE4

    絲?。?strong>SN74LS240N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

    1 Features 1? Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs ? Maximum tpd of 15 ns at 5 V ? 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers ? PNP Inputs Reduce DC Loading ? Hysteresis at Inputs Improves Noise Margins 2 Applications ? Servers

    文件:1.80265 Mbytes 頁數(shù):41 Pages

    TI

    德州儀器

    SN74LS240NSR

    絲?。?a target="_blank" title="Marking" href="/74ls240/marking.html">74LS240;Package:SO;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

    1 Features 1? Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs ? Maximum tpd of 15 ns at 5 V ? 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers ? PNP Inputs Reduce DC Loading ? Hysteresis at Inputs Improves Noise Margins 2 Applications ? Servers

    文件:1.80265 Mbytes 頁數(shù):41 Pages

    TI

    德州儀器

    SN74LS240NSR

    絲?。?a target="_blank" title="Marking" href="/74ls240/marking.html">74LS240;Package:SO;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

    1 Features 1? Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs ? Maximum tpd of 15 ns at 5 V ? 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers ? PNP Inputs Reduce DC Loading ? Hysteresis at Inputs Improves Noise Margins 2 Applications ? Servers

    文件:1.80212 Mbytes 頁數(shù):41 Pages

    TI

    德州儀器

    詳細(xì)參數(shù)

    • 型號(hào):

      SN74LS240N

    • 功能描述:

      緩沖器和線路驅(qū)動(dòng)器 Octal Buffer/Line

    • RoHS:

    • 制造商:

      Micrel

    • 輸入線路數(shù)量:

      1

    • 輸出線路數(shù)量:

      2

    • 極性:

      Non-Inverting

    • 電源電壓-最大:

      +/- 5.5 V

    • 電源電壓-最?。?/span>

      +/- 2.37 V

    • 最大工作溫度:

      + 85 C

    • 安裝風(fēng)格:

      SMD/SMT

    • 封裝/箱體:

      MSOP-8

    • 封裝:

      Reel

    供應(yīng)商型號(hào)品牌批號(hào)封裝庫存備注價(jià)格
    TI
    21+
    DIP20
    10000
    勤思達(dá)只做原裝 現(xiàn)貨庫存 支持支持實(shí)單
    詢價(jià)
    TI/德州儀器
    23+/24+
    DIP20
    9865
    主推型號(hào),原裝正品,終端BOM表可配單,可開13點(diǎn)稅
    詢價(jià)
    TI
    25+
    DIP
    5000
    熱賣
    詢價(jià)
    TMS
    05+
    PDIP
    1000
    全新原裝 絕對(duì)有貨
    詢價(jià)
    TI
    24+/25+
    60
    原裝正品現(xiàn)貨庫存價(jià)優(yōu)
    詢價(jià)
    TEXAS
    24+
    DIP20P
    6868
    原裝現(xiàn)貨,可開13%稅票
    詢價(jià)
    TI
    16+
    DIP
    37
    全新原裝現(xiàn)貨
    詢價(jià)
    TI
    97+
    DIP20
    5600
    全新原裝進(jìn)口自己庫存優(yōu)勢(shì)
    詢價(jià)
    TI
    5
    1000
    正品原裝--自家現(xiàn)貨-實(shí)單可談
    詢價(jià)
    TI
    23+
    64/DIP
    5000
    原裝正品,假一罰十
    詢價(jià)
    更多SN74LS240N供應(yīng)商 更新時(shí)間2026-1-22 11:04:00

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