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    首頁
                >SN74LS173A>規(guī)格書列表
                
    
            
    
                
    
                    
    型號下載 訂購功能描述制造商 上傳企業(yè)LOGO
    
                    
    SN74LS173A
    4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS
    
3-State Outputs Interface Directly With
System Bus
Gated Output-Control LInes for Enabling or
Disabling the Outputs
Fully Independent Clock Virtually
Eliminates Restrictions for Operating in
One of Two Modes:
– Parallel Load
– Do Nothing (Hold)
For Application as Bus Buffer Registers
Pac
    文件：966.44 Kbytes 頁數(shù)：19 Pages
    TI
    德州儀器
    

    SN74LS173A
    4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS
    文件：562.82 Kbytes 頁數(shù)：19 Pages
    TI
    德州儀器
    

    SN74LS173AD
    絲?。?a target="_blank" title="Marking" href="/ls173a/marking.html">LS173A；Package：SOIC；4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS
    
3-State Outputs Interface Directly With
System Bus
Gated Output-Control LInes for Enabling or
Disabling the Outputs
Fully Independent Clock Virtually
Eliminates Restrictions for Operating in
One of Two Modes:
– Parallel Load
– Do Nothing (Hold)
For Application as Bus Buffer Registers
Pac
    文件：966.44 Kbytes 頁數(shù)：19 Pages
    TI
    德州儀器
    

    SN74LS173AD.A
    絲?。?a target="_blank" title="Marking" href="/ls173a/marking.html">LS173A；Package：SOIC；4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS
    
3-State Outputs Interface Directly With
System Bus
Gated Output-Control LInes for Enabling or
Disabling the Outputs
Fully Independent Clock Virtually
Eliminates Restrictions for Operating in
One of Two Modes:
– Parallel Load
– Do Nothing (Hold)
For Application as Bus Buffer Registers
Pac
    文件：966.44 Kbytes 頁數(shù)：19 Pages
    TI
    德州儀器
    

    SN74LS173AN
    絲印：SN74LS173AN；Package：PDIP；4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS
    
3-State Outputs Interface Directly With
System Bus
Gated Output-Control LInes for Enabling or
Disabling the Outputs
Fully Independent Clock Virtually
Eliminates Restrictions for Operating in
One of Two Modes:
– Parallel Load
– Do Nothing (Hold)
For Application as Bus Buffer Registers
Pac
    文件：966.44 Kbytes 頁數(shù)：19 Pages
    TI
    德州儀器
    

    SN74LS173AN.A
    絲?。?a target="_blank" title="Marking" href="/sn74ls173an/marking.html">SN74LS173AN；Package：PDIP；4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS
    
3-State Outputs Interface Directly With
System Bus
Gated Output-Control LInes for Enabling or
Disabling the Outputs
Fully Independent Clock Virtually
Eliminates Restrictions for Operating in
One of Two Modes:
– Parallel Load
– Do Nothing (Hold)
For Application as Bus Buffer Registers
Pac
    文件：966.44 Kbytes 頁數(shù)：19 Pages
    TI
    德州儀器
    

    SN74LS173AD
    4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS
    文件：497.3 Kbytes 頁數(shù)：20 Pages
    TI
    德州儀器
    

    SN74LS173AD
    4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS
    文件：562.82 Kbytes 頁數(shù)：19 Pages
    TI
    德州儀器
    

    SN74LS173ADE4
    4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS
    文件：562.82 Kbytes 頁數(shù)：19 Pages
    TI
    德州儀器
    

    SN74LS173ADR
    4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS
    文件：562.82 Kbytes 頁數(shù)：19 Pages
    TI
    德州儀器
    

    
            
    
		
        
    
            
    
                
    替換型號
    
            
    
            
            
        
    
		
        
    
            
    
                
    技術(shù)參數(shù)
    
            
    
            
      
            	
    • Input type：
      TTL
    • Output type：
      TTL
    • VCC(Min)(V)：
      4.75
    • VCC(Max)(V)：
      5.25
    • IOL(Max)(mA)：
      24
    • IOH(Max)(mA)：
      -2.6
    • Rating：
      Catalog
    • Package Group：
      PDIP
    
            
    
        
    
            
    供應(yīng)商型號品牌批號封裝庫存備注價格
    
                
    



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    1150
    		

    只做原裝，歡迎詢價，量大價優(yōu)
    		
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    TI
    		

    25+
    		

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    全新現(xiàn)貨
    		
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    高頻管
    		

    18000
    		

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    TMS
    		

    05+
    		

    PDIP
    		

    1000
    		

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    TI
    		

    23+
    		

    DIP
    		

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    DIP
    		

    7860
    		

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            更新時間2026-1-21 15:30:00
        
    
        
    
          
    
            
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