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                >SN74LS17>規(guī)格書(shū)列表
                
    
            
    
                
    
                    
    型號(hào)下載 訂購(gòu)功能描述制造商 上傳企業(yè)LOGO
    
                    
    SN74LS173D
    4-BIT D-TYPE REGISTER WITH 3-STATE OUTPUTS
    
4-BIT D-TYPE REGISTERWITH 3-STATE OUTPUTS

The SN54/74LS173A is a high-speed 4-BitRegister featuring 3-state outputs foruse in bus-organized systems. The clock is fully edge-triggered allowingeither a load from the D inputs ora hold (retain register contents) dependingon the state of the Input E
    文件：207.6 Kbytes 頁(yè)數(shù)：6 Pages
    MOTOROLA
    摩托羅拉
    

    SN74LS173N
    4-BIT D-TYPE REGISTER WITH 3-STATE OUTPUTS
    
4-BIT D-TYPE REGISTERWITH 3-STATE OUTPUTS

The SN54/74LS173A is a high-speed 4-BitRegister featuring 3-state outputs foruse in bus-organized systems. The clock is fully edge-triggered allowingeither a load from the D inputs ora hold (retain register contents) dependingon the state of the Input E
    文件：207.6 Kbytes 頁(yè)數(shù)：6 Pages
    MOTOROLA
    摩托羅拉
    

    SN74LS174
    HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
    
“174, 'LS174, ‘S174 Contain Six Flip-Flops
with Single-Rail Outputs
‘175, 'L.S175, ‘S175 Contain Four Flip-Flops
with Double-Rail Outputs
Three Performance Ranges Offered: See
Table Lower Right
Buffered Clock and Direct Clear Inputs
Individual Data Input to Each Flip-Flop
Applications incl
    文件：494.45 Kbytes 頁(yè)數(shù)：16 Pages
    TI
    德州儀器
    

    SN74LS174
    LOW POWER SCHOTTKY
    
The LSTTL/MSI SN74LS174 is a high speed Hex D Flip-Flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is transferred to storage during the LOW to HIGH clock transition. The device has a Master Reset to simultaneously clear all flip-flops.
    文件：104.94 Kbytes 頁(yè)數(shù)：8 Pages
    ONSEMI
    安森美半導(dǎo)體
    

    SN74LS174D
    絲?。?a target="_blank" title="Marking" href="/ls174/marking.html">LS174；Package：SOIC；HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
    
“174, 'LS174, ‘S174 Contain Six Flip-Flops
with Single-Rail Outputs
‘175, 'L.S175, ‘S175 Contain Four Flip-Flops
with Double-Rail Outputs
Three Performance Ranges Offered: See
Table Lower Right
Buffered Clock and Direct Clear Inputs
Individual Data Input to Each Flip-Flop
Applications incl
    文件：494.45 Kbytes 頁(yè)數(shù)：16 Pages
    TI
    德州儀器
    

    SN74LS174D
    HEX D FLIP-FLOP
    
The LSTTL/MSI SN54/74LS174 is a high speed Hex D Flip-Flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is transferred to storage during the LOW to HIGH clock transition. The device has a Master Reset to simultaneously clear all flip-flo
    文件：75.8 Kbytes 頁(yè)數(shù)：3 Pages
    MOTOROLA
    摩托羅拉
    

    SN74LS174D
    LOW POWER SCHOTTKY
    
The LSTTL/MSI SN74LS174 is a high speed Hex D Flip-Flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is transferred to storage during the LOW to HIGH clock transition. The device has a Master Reset to simultaneously clear all flip-flops.
    文件：104.94 Kbytes 頁(yè)數(shù)：8 Pages
    ONSEMI
    安森美半導(dǎo)體
    

    SN74LS174DR
    絲?。?a target="_blank" title="Marking" href="/ls174/marking.html">LS174；Package：SOIC；HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
    
“174, 'LS174, ‘S174 Contain Six Flip-Flops
with Single-Rail Outputs
‘175, 'L.S175, ‘S175 Contain Four Flip-Flops
with Double-Rail Outputs
Three Performance Ranges Offered: See
Table Lower Right
Buffered Clock and Direct Clear Inputs
Individual Data Input to Each Flip-Flop
Applications incl
    文件：494.45 Kbytes 頁(yè)數(shù)：16 Pages
    TI
    德州儀器
    

    SN74LS174DR.A
    絲?。?a target="_blank" title="Marking" href="/ls174/marking.html">LS174；Package：SOIC；HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
    
“174, 'LS174, ‘S174 Contain Six Flip-Flops
with Single-Rail Outputs
‘175, 'L.S175, ‘S175 Contain Four Flip-Flops
with Double-Rail Outputs
Three Performance Ranges Offered: See
Table Lower Right
Buffered Clock and Direct Clear Inputs
Individual Data Input to Each Flip-Flop
Applications incl
    文件：494.45 Kbytes 頁(yè)數(shù)：16 Pages
    TI
    德州儀器
    

    SN74LS174N
    HEX D FLIP-FLOP
    
The LSTTL/MSI SN54/74LS174 is a high speed Hex D Flip-Flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is transferred to storage during the LOW to HIGH clock transition. The device has a Master Reset to simultaneously clear all flip-flo
    文件：75.8 Kbytes 頁(yè)數(shù)：3 Pages
    MOTOROLA
    摩托羅拉
    

    
            
    
		
        
    
            
    
                
    替換型號(hào)
    
            
    
            
            
        
    
		
        
    
            
    
                
    技術(shù)參數(shù)
    
            
    
            
      
            	
    • Input type：
      TTL
    • Output type：
      TTL
    • VCC(Min)(V)：
      4.75
    • VCC(Max)(V)：
      5.25
    • IOL(Max)(mA)：
      24
    • IOH(Max)(mA)：
      -2.6
    • Rating：
      Catalog
    • Package Group：
      PDIP
    
            
    
        
    
            
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