SN74BCT574集成電路（IC）的觸發(fā)器規(guī)格書PDF中文資料

SN74BCT574屬于集成電路（IC）的觸發(fā)器。由德州儀器制造生產(chǎn)的SN74BCT574觸發(fā)器觸發(fā)器是能夠存儲(chǔ)單個(gè)邏輯狀態(tài)或信息“位”的基本數(shù)字存儲(chǔ)器件。這些器件至少有兩個(gè)輸入；一個(gè)或多個(gè)用于傳遞要存儲(chǔ)的數(shù)據(jù)，另一個(gè)用于指示存儲(chǔ)該數(shù)據(jù)的時(shí)間點(diǎn)。不同的觸發(fā)器類型，例如 D（延遲）、SR（置位復(fù)位）和 JK，對提供給其輸入的信號(hào)有不同的響應(yīng)，可用于實(shí)現(xiàn)不同的邏輯功能。這些器件與鎖存器的不同之處在于它們是邊緣敏感器件，其保持的邏輯狀態(tài)僅在接收到有效時(shí)鐘信號(hào)時(shí)才會(huì)改變。

Operating Voltage Range of 4.5 V to 5.5 V

State-of-the-Art BiCMOS Design

Significantly Reduces ICCZ

Full Parallel Access for Loading

ESD Protection Exceeds JESD 22

? 2000-V Human-Body Model (A114-A)

? 200-V Machine Model (A115-A)

? 1000-V Charged-Device Model (C101)

description/ordering information

These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively

low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional

bus drivers, and working registers.

The eight flip-flops of the ’BCT574 devices are edge-triggered D-type flip-flops. On the positive transition of the

clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high

or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive

the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus

lines without interface or pullup components.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.