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          首頁(yè) >SN74AUC32>規(guī)格書列表

          型號(hào)下載 訂購(gòu)功能描述制造商 上傳企業(yè)LOGO

          SN74AUC32

          QUADRUPLE 2-INPUT POSITIVE-OR GATE

          FEATURES · Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation · Ioff Supports Partial-Power-Down Mode Operation · Sub-1-V Operable · Max tpd of 2.2 ns at 1.8 V · Low Power Consumption, 10-mA Max ICC · ±8-mA Output Drive at 1.8 V · Latch-Up Perf

          文件:993.44 Kbytes 頁(yè)數(shù):12 Pages

          TI

          德州儀器

          SN74AUC32

          QUADRUPLE 2-INPUT POSITIVE-OR GATE

          文件:403.61 Kbytes 頁(yè)數(shù):9 Pages

          TI

          德州儀器

          SN74AUC32

          4 通道、2 輸入、0.8V 至 2.7V 高速或門

          This quadruple 2-input positive-OR gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.\n\n The SN74AUC32 device performs the Boolean function Y = A?B or Y = (A\\ ? B\\)\\ in positive logic.\n\n This device is fully specified for partial-power-d ? Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation\n? Ioff Supports Partial-Power-Down Mode Operation\n? Sub-1-V Operable\n? Max tpd of 2.2 ns at 1.8 V\n? Low Power Consumption, 10-μA Max ICC\n? ±8-mA Output Drive at 1.8 V\n? Latch-Up Performance Exceeds;

          TI

          德州儀器

          SN74AUC32RGYR

          絲?。?a target="_blank" title="Marking" href="/ms32/marking.html">MS32;Package:VQFN;QUADRUPLE 2-INPUT POSITIVE-OR GATE

          FEATURES · Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation · Ioff Supports Partial-Power-Down Mode Operation · Sub-1-V Operable · Max tpd of 2.2 ns at 1.8 V · Low Power Consumption, 10-mA Max ICC · ±8-mA Output Drive at 1.8 V · Latch-Up Perf

          文件:993.44 Kbytes 頁(yè)數(shù):12 Pages

          TI

          德州儀器

          SN74AUC32RGYR.B

          絲印:MS32;Package:VQFN;QUADRUPLE 2-INPUT POSITIVE-OR GATE

          FEATURES · Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation · Ioff Supports Partial-Power-Down Mode Operation · Sub-1-V Operable · Max tpd of 2.2 ns at 1.8 V · Low Power Consumption, 10-mA Max ICC · ±8-mA Output Drive at 1.8 V · Latch-Up Perf

          文件:993.44 Kbytes 頁(yè)數(shù):12 Pages

          TI

          德州儀器

          SN74AUC32244

          32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

          文件:283.07 Kbytes 頁(yè)數(shù):10 Pages

          TI

          德州儀器

          SN74AUC32244GKER

          32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

          文件:283.07 Kbytes 頁(yè)數(shù):10 Pages

          TI

          德州儀器

          SN74AUC32244ZKER

          32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

          文件:283.07 Kbytes 頁(yè)數(shù):10 Pages

          TI

          德州儀器

          SN74AUC32245

          32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

          文件:389.61 Kbytes 頁(yè)數(shù):12 Pages

          TI

          德州儀器

          SN74AUC32245GKER

          32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

          文件:389.61 Kbytes 頁(yè)數(shù):12 Pages

          TI

          德州儀器

          技術(shù)參數(shù)

          • Supply voltage (Min) (V):

            0.8

          • Supply voltage (Max) (V):

            2.7

          • Number of channels (#):

            4

          • Inputs per channel:

            2

          • IOL (Max) (mA):

            9

          • IOH (Max) (mA):

            -9

          • Input type:

            Standard CMOS

          • Output type:

            Push-Pull

          • Features:

            Partial power down (Ioff)

          • Data rate (Max) (Mbps):

            250

          • Rating:

            Catalog

          • Operating temperature range (C):

            -40 to 85

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          更多SN74AUC32供應(yīng)商 更新時(shí)間2026-1-19 15:04:00
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