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          SN65MLVD2
          SINGLE M-LVDS RECEIVERS
          
FEATURES
· Low-Voltage Differential 30-W to 55-W Line
Receivers for Signaling Rates(1) up to
250Mbps; Clock Frequencies up to 125MHz
· SN65MLVD2 Type-1 Receiver Incorporates 25
mV of Input Threshold Hysteresis
· SN65MLVD3 Type-2 Receiver Provides 100
mV Offset Threshold to Detect Open-Circu
          文件：754.21 Kbytes 頁(yè)數(shù)：23 Pages
          TI
          德州儀器
          

          SN65MLVD2
          SINGLE M-LVDS RECEIVERS
          文件：340.49 Kbytes 頁(yè)數(shù)：17 Pages
          TI
          德州儀器
          

          SN65MLVD2
          單通道 M-LVDS 1 類接收器
          The SN65MLVD2 and SN65MLVD3 are single-channel M-LVDS receivers. These devices are designed in full compliance with the TIA/EIA-899 (M-LVDS) standard, which are optimized to operate at signaling rates up to 250 Mbps. Each receiver channel is controlled by a receive enable (RE). When RE = low, the co  ? Low-Voltage Differential 30- Line Receivers for Signaling Rates\n? SN65MLVD2 Type-1 Receiver Incorporates 25 mV of Input Threshold Hysteresis\n? Wide Receiver Input Common-Mode Voltage Range, -1 V to 3.4 V, Allows 2 V of Ground Noise\n? Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoi;
          TI
          德州儀器
          

          SN65MLVD200A
          SN65MLVD20xx Multipoint-LVDS Line Driver and Receiver
          
1 Features
? Low-Voltage Differential 30Ω to 55Ω Line Drivers
and Receivers for Signaling Rates 1 up to
100Mbps, Clock Frequencies up to 50MHz
? Type-1 Receivers Incorporate 25mV of Hysteresis
(SN65MLVD200A, SN65MLVD202A)
? Type-2 Receivers Provide an Offset (100mV)
Threshold to Detect Open
          文件：1.52443 Mbytes 頁(yè)數(shù)：42 Pages
          TI
          德州儀器
          

          SN65MLVD200AD
          絲印：MF200A；Package：SOIC(D)；SN65MLVD20xx Multipoint-LVDS Line Driver and Receiver
          
1 Features
? Low-Voltage Differential 30Ω to 55Ω Line Drivers
and Receivers for Signaling Rates 1 up to
100Mbps, Clock Frequencies up to 50MHz
? Type-1 Receivers Incorporate 25mV of Hysteresis
(SN65MLVD200A, SN65MLVD202A)
? Type-2 Receivers Provide an Offset (100mV)
Threshold to Detect Open
          文件：1.52443 Mbytes 頁(yè)數(shù)：42 Pages
          TI
          德州儀器
          

          SN65MLVD200AD.B
          絲?。?a target="_blank" title="Marking" href="/mf200a/marking.html">MF200A；Package：SOIC(D)；SN65MLVD20xx Multipoint-LVDS Line Driver and Receiver
          
1 Features
? Low-Voltage Differential 30Ω to 55Ω Line Drivers
and Receivers for Signaling Rates 1 up to
100Mbps, Clock Frequencies up to 50MHz
? Type-1 Receivers Incorporate 25mV of Hysteresis
(SN65MLVD200A, SN65MLVD202A)
? Type-2 Receivers Provide an Offset (100mV)
Threshold to Detect Open
          文件：1.52443 Mbytes 頁(yè)數(shù)：42 Pages
          TI
          德州儀器
          

          SN65MLVD200ADG4
          絲?。?a target="_blank" title="Marking" href="/mf200a/marking.html">MF200A；Package：SOIC(D)；SN65MLVD20xx Multipoint-LVDS Line Driver and Receiver
          
1 Features
? Low-Voltage Differential 30Ω to 55Ω Line Drivers
and Receivers for Signaling Rates 1 up to
100Mbps, Clock Frequencies up to 50MHz
? Type-1 Receivers Incorporate 25mV of Hysteresis
(SN65MLVD200A, SN65MLVD202A)
? Type-2 Receivers Provide an Offset (100mV)
Threshold to Detect Open
          文件：1.52443 Mbytes 頁(yè)數(shù)：42 Pages
          TI
          德州儀器
          

          SN65MLVD200ADR
          絲?。?a target="_blank" title="Marking" href="/mf200a/marking.html">MF200A；Package：SOIC(D)；SN65MLVD20xx Multipoint-LVDS Line Driver and Receiver
          
1 Features
? Low-Voltage Differential 30Ω to 55Ω Line Drivers
and Receivers for Signaling Rates 1 up to
100Mbps, Clock Frequencies up to 50MHz
? Type-1 Receivers Incorporate 25mV of Hysteresis
(SN65MLVD200A, SN65MLVD202A)
? Type-2 Receivers Provide an Offset (100mV)
Threshold to Detect Open
          文件：1.52443 Mbytes 頁(yè)數(shù)：42 Pages
          TI
          德州儀器
          

          SN65MLVD200ADR.B
          絲?。?a target="_blank" title="Marking" href="/mf200a/marking.html">MF200A；Package：SOIC(D)；SN65MLVD20xx Multipoint-LVDS Line Driver and Receiver
          
1 Features
? Low-Voltage Differential 30Ω to 55Ω Line Drivers
and Receivers for Signaling Rates 1 up to
100Mbps, Clock Frequencies up to 50MHz
? Type-1 Receivers Incorporate 25mV of Hysteresis
(SN65MLVD200A, SN65MLVD202A)
? Type-2 Receivers Provide an Offset (100mV)
Threshold to Detect Open
          文件：1.52443 Mbytes 頁(yè)數(shù)：42 Pages
          TI
          德州儀器
          

          SN65MLVD200ADRG4
          絲?。?a target="_blank" title="Marking" href="/mf200a/marking.html">MF200A；Package：SOIC(D)；SN65MLVD20xx Multipoint-LVDS Line Driver and Receiver
          
1 Features
? Low-Voltage Differential 30Ω to 55Ω Line Drivers
and Receivers for Signaling Rates 1 up to
100Mbps, Clock Frequencies up to 50MHz
? Type-1 Receivers Incorporate 25mV of Hysteresis
(SN65MLVD200A, SN65MLVD202A)
? Type-2 Receivers Provide an Offset (100mV)
Threshold to Detect Open
          文件：1.52443 Mbytes 頁(yè)數(shù)：42 Pages
          TI
          德州儀器
          

          
            
          
		
        
          
            
          
                
          技術(shù)參數(shù)
          
            
          
            
            
            	
          • Protocols：
            M-LVDS
          • Number of transmitters：
            0
          • Number of receivers：
            1
          • Supply voltage (V)：
            3.3
          • Signaling rate (Mbps)：
            250
          • Input signal：
            M-LVDS
          • Output signal：
            LVTTL
          • Rating：
            Catalog
          • Operating temperature range (C)：
            -40 to 85
          
            
          
        
          
            
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            更新時(shí)間2026-1-21 15:01:00
        
          
        
          
          
          
            
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