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          首頁(yè) >SI5330>規(guī)格書列表

          型號(hào)下載 訂購(gòu)功能描述制造商 上傳企業(yè)LOGO

          SI5330C-B00208-GM

          1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR

          Features ? Supports single-ended or differential input clock signals ? Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs ? Provides signal level translation ??Differential to single-ended ??Single-ended to differential ??Differential to dif

          文件:1.56571 Mbytes 頁(yè)數(shù):22 Pages

          SKYWORKS

          思佳訊

          SI5330C-B00209-GM

          1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR

          Features ? Supports single-ended or differential input clock signals ? Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs ? Provides signal level translation ??Differential to single-ended ??Single-ended to differential ??Differential to dif

          文件:1.56571 Mbytes 頁(yè)數(shù):22 Pages

          SKYWORKS

          思佳訊

          SI5330F-A00214-GM

          Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs

          Features ■ Supports single-ended or differential input clock signals ■ Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs ■ Provides signal level translation ● Differential to single-ended ● Single-ended to differential ● Differential t

          文件:158.78 Kbytes 頁(yè)數(shù):20 Pages

          SILABS

          芯科科技

          SI5330F-A00214-GM

          1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR

          Features ■ Supports single-ended or differential input clock signals ■ Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs ■ Provides signal level translation ● Differential to single-ended ● Single-ended to differential ● Differential t

          文件:158.78 Kbytes 頁(yè)數(shù):20 Pages

          SILABS

          芯科科技

          SI5330F-A00215-GM

          1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR

          Features ■ Supports single-ended or differential input clock signals ■ Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs ■ Provides signal level translation ● Differential to single-ended ● Single-ended to differential ● Differential t

          文件:158.78 Kbytes 頁(yè)數(shù):20 Pages

          SILABS

          芯科科技

          SI5330F-A00215-GM

          Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs

          Features ■ Supports single-ended or differential input clock signals ■ Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs ■ Provides signal level translation ● Differential to single-ended ● Single-ended to differential ● Differential t

          文件:158.78 Kbytes 頁(yè)數(shù):20 Pages

          SILABS

          芯科科技

          SI5330F-A00216-GM

          1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR

          Features ■ Supports single-ended or differential input clock signals ■ Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs ■ Provides signal level translation ● Differential to single-ended ● Single-ended to differential ● Differential t

          文件:158.78 Kbytes 頁(yè)數(shù):20 Pages

          SILABS

          芯科科技

          SI5330F-A00216-GM

          Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs

          Features ■ Supports single-ended or differential input clock signals ■ Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs ■ Provides signal level translation ● Differential to single-ended ● Single-ended to differential ● Differential t

          文件:158.78 Kbytes 頁(yè)數(shù):20 Pages

          SILABS

          芯科科技

          SI5330F-B00214-GM

          1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR

          Features ? Supports single-ended or differential input clock signals ? Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs ? Provides signal level translation ??Differential to single-ended ??Single-ended to differential ??Differential to dif

          文件:1.56571 Mbytes 頁(yè)數(shù):22 Pages

          SKYWORKS

          思佳訊

          SI5330F-B00215-GM

          1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR

          Features ? Supports single-ended or differential input clock signals ? Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs ? Provides signal level translation ??Differential to single-ended ??Single-ended to differential ??Differential to dif

          文件:1.56571 Mbytes 頁(yè)數(shù):22 Pages

          SKYWORKS

          思佳訊

          技術(shù)參數(shù)

          • Temperature Range Min (°C):

            -40

          • Package Type:

            QFN32

          • OPN:

            Si53301-B-GM

          • Line Impedance Match:

            0

          • Universal Buffers:

            true

          • Number of Inputs:

            2

          • Number of Outputs:

            6

          • Frequency Max:

            725

          • Frequency Min (MHz):

            1

          • Package Size (mm):

            5x5

          • Description:

            Universal 2

          • VDDO (V):

            1.8 V; 2.5 V; 3.3 V

          • Ouput Format(s):

            CML; HCSL; LVCMOS; LVDS; LVPECL

          • Additive Jitter (ps RMS):

            0.05

          • VDD (V):

            1.8 V; 2.5 V; 3.3 V

          • PCIe Compliant:

            true

          • Feedback Path:

            false

          • Output Format Categories:

            Differential; Single-Ended

          • Single Ended Input:

            false

          • LVCMOS Buffers:

            false

          • Differential Buffers:

            true

          • Temperature Range Max (°C):

            85

          • Dual:

            false

          • Zero Delay Buffers:

            false

          供應(yīng)商型號(hào)品牌批號(hào)封裝庫(kù)存備注價(jià)格
          SILICON
          QFN
          6698
          詢價(jià)
          SILICON/芯科
          2450+
          QFN
          6540
          只做原廠原裝正品終端客戶免費(fèi)申請(qǐng)樣品
          詢價(jià)
          SILICON/芯科
          25+
          QFN24
          15000
          SILICON/芯科全系列在售,支持訂貨
          詢價(jià)
          SiliconL..
          23+
          QFN24
          4500
          絕對(duì)全新原裝!優(yōu)勢(shì)供貨渠道!特價(jià)!請(qǐng)放心訂購(gòu)!
          詢價(jià)
          SiliconLaboratoriesInc
          24+
          24-QFN
          75
          詢價(jià)
          SILICONLABS
          23+
          SILICONLABS
          28520
          原廠授權(quán)代理分銷現(xiàn)貨只做原裝正邁科技樣品支持現(xiàn)貨
          詢價(jià)
          SILICON
          2016+
          QFN
          6000
          只做原裝,假一罰十,公司可開17%增值稅發(fā)票!
          詢價(jià)
          SILICON
          25+
          QFN16
          10
          百分百原裝正品 真實(shí)公司現(xiàn)貨庫(kù)存 本公司只做原裝 可
          詢價(jià)
          SiliconLabs
          1650+
          ?
          7500
          只做原裝進(jìn)口,假一罰十
          詢價(jià)
          Silicon
          23+
          QFN24
          8560
          受權(quán)代理!全新原裝現(xiàn)貨特價(jià)熱賣!
          詢價(jià)
          更多SI5330供應(yīng)商 更新時(shí)間2026-1-21 13:01:00
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