FemtoClock 2 Jitter Attenuator and Clock Generator

Features ? Can be configured as clock generator or jitter attenuator/synchronizer ? Low power, less than 0.8W typical ? Low jitter, less than 50fs-RMS ? Compliant with ITU-T G.8262 and G.8262.1 option 1 and 2 for synchronous Ethernet Equipment Clock (EEC/eEEC) without degrading output jitte

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FemtoClock 2 Jitter Attenuator or Clock Generator

The RC32508A regenerates and distributes ultra-low jitter clock outputs and features up to 2 independent frequency domains that can be either locked to the external reference clock or locked to a free-run crystal or oscillator. Digital PLL (DPLL) support hitless reference switching between reference ? Can be configured as clock generator or jitter attenuator/synchronizer\n? Low power, less than 0.8W typical\n? Low jitter, less than 50fs-RMS\n? Compliant with ITU-T G.8262 & G.8262.1 option 1 and 2 for synchronous Ethernet Equipment Clock (EEC/eEEC) without degrading output jitter\n? Jitter atten;

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1.1 V to 5.5 V, Slew Rate Controlled Load Switch in TSOT23-6

文件：274.84 Kbytes 頁(yè)數(shù)：13 Pages

VISHAYVishay Siliconix

威世威世科技公司

1.1 V to 5.5 V, Slew Rate Controlled Load Switch in TSOT23-6

文件：225.75 Kbytes 頁(yè)數(shù)：10 Pages

VISHAYVishay Siliconix

威世威世科技公司