Programmable logic array 22 ? 42 ? 10

DESCRIPTION The PLS173 is a two-level logic element consisting of 42 AND gates and 10 OR gates with fusible link connections for programming I/O polarity and direction. All AND gates are linked to 12 inputs (I) and 10 bidirectional I/O lines (B). These yield variable I/O gate configurations

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Programmable logic array 22 × 42 × 10

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Programmable logic array 22 ? 42 ? 10

DESCRIPTION The PLS173 is a two-level logic element consisting of 42 AND gates and 10 OR gates with fusible link connections for programming I/O polarity and direction. All AND gates are linked to 12 inputs (I) and 10 bidirectional I/O lines (B). These yield variable I/O gate configurations

文件：73.49 Kbytes 頁數(shù)：8 Pages

PHI

PHI

Programmable logic array 22 ? 42 ? 10

DESCRIPTION The PLS173 is a two-level logic element consisting of 42 AND gates and 10 OR gates with fusible link connections for programming I/O polarity and direction. All AND gates are linked to 12 inputs (I) and 10 bidirectional I/O lines (B). These yield variable I/O gate configurations

文件：73.49 Kbytes 頁數(shù)：8 Pages

PHI

PHI

Programmable logic array (22 × 42 × 10)

DESCRIPTION\nThe PLS173 is a two-level logic element consisting of 42 AND gates and 10 OR gates with fusible link connections for programming I/O polarity and direction. All AND gates are linked to 12 inputs (I) and\n10 bidirectional I/O lines (B). These yield variable I/O gate configurations via 10 ? I/O propagation delay: 30ns (max.)\n? 12 inputs\n? 42 AND gates\n? 10 OR gates\n? 10 bidirectional I/O lines\n? Active-High or -Low outputs\n? 42 product terms:\n– 32 logic terms\n– 10 control terms\n? Ni-Cr programmable links\n? Input loading: –100μA (max.)\n? Power dissipation: 750mW (typ.)\n? 3;

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