LMK5C33216 Ultra-Low Jitter Clock Synchronizer with JESD204B for Wireless Communications with BAW

文件：3.42385 Mbytes 頁數(shù)：93 Pages

TI

德州儀器

LMK5C33216 Ultra-Low Jitter Clock Synchronizer with JESD204B for Wireless Communications with BAW

文件：3.42385 Mbytes 頁數(shù)：93 Pages

TI

德州儀器

LMK5C33216A Network Synchronizer With JED204B/JED204C and BAW VCO for Wireless Communications

1 Features ? Ultra-low jitter BAW VCO based Wireless clocks – 42-fs typical/ 60-fs maximum RMS jitter at 491.52 MHz – 47-fs typical/ 65-fs maximum RMS jitter at 245.76 MHz ? Three high-performance Digital Phase Locked Loops (DPLLs) with paired Analog Phase Locked Loops (APLLs) – Programma

文件：4.6477 Mbytes 頁數(shù)：99 Pages

TI

德州儀器

LMK5B12212 1-DPLL 2-APLL 2-IN 12-OUT Network Synchronizer With BAW VCO for Ethernet-Based Networking Applications

1 Features ? Ultra-low jitter BAW VCO based Ethernet clocks – 13fs typical RMS jitter at 625MHz with 4MHz 1st order high-pass filter (HPF) – 24fs typical RMS jitter at 312.5MHz with 4MHz 1st order HPF – 42fs typical/ 60fs maximum RMS jitter at 312.5MHz – 47fs typical/ 65fs maximum RMS jitt

文件：5.65494 Mbytes 頁數(shù)：97 Pages

TI

德州儀器