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    PLL1707
    3.3-V DUAL PLL MULTICLOCK GENERATOR
    
FEATURES
27-MHz Master Clock Input
Generated Audio System Clock (PLL1707):
– SCKO0: 768 fS (fS = 44.1 kHz)
– SCKO1: 768 fS, 512 fS (fS = 48 kHz)
– SCKO2: 256 fS (fS = 32, 44.1, 48, 64, 88.2,
96 kHz)
– SCKO3: 384 fS (fS = 32, 44.1, 48, 64, 88.2,
96 kHz)
Generated Audio System Clock (PLL170
    文件：365.33 Kbytes 頁數(shù)：25 Pages
    TI
    德州儀器
    

    PLL1707
    3.3-V DUAL-PLL MULTICLOCK GENERATOR
    
1FEATURES
? Qualified for Automotive Applications
? 27-MHz Master Clock Input
? Generated Audio System Clock
– SCKO0: 768 fS (fS = 44.1 kHz)
– SCKO1: 768 fS, 512 fS (fS = 48 kHz)
– SCKO2: 256 fS (fS = 32, 44.1, 48, 64, 88.2, 96
kHz)
– SCKO3: 384 f S (fS = 32, 44.1, 48, 64, 88.2, 96
kHz)

    文件：830.92 Kbytes 頁數(shù)：18 Pages
    TI
    德州儀器
    

    PLL1707
    3.3 V DUAL PLL MULTICLOCK GENERATOR
    文件：171.48 Kbytes 頁數(shù)：22 Pages
    BURR-BROWN
    

    PLL1707
    3.3-V DUAL PLL MULTICLOCK GENERATOR
    文件：617.56 Kbytes 頁數(shù)：25 Pages
    TI
    德州儀器
    

    PLL1707DBQ
    絲?。?strong>PLL1707；Package：SSOP；3.3-V DUAL PLL MULTICLOCK GENERATOR
    
FEATURES
27-MHz Master Clock Input
Generated Audio System Clock (PLL1707):
– SCKO0: 768 fS (fS = 44.1 kHz)
– SCKO1: 768 fS, 512 fS (fS = 48 kHz)
– SCKO2: 256 fS (fS = 32, 44.1, 48, 64, 88.2,
96 kHz)
– SCKO3: 384 fS (fS = 32, 44.1, 48, 64, 88.2,
96 kHz)
Generated Audio System Clock (PLL170
    文件：365.33 Kbytes 頁數(shù)：25 Pages
    TI
    德州儀器
    

    PLL1707DBQ.B
    絲?。?strong>PLL1707；Package：SSOP；3.3-V DUAL PLL MULTICLOCK GENERATOR
    
FEATURES
27-MHz Master Clock Input
Generated Audio System Clock (PLL1707):
– SCKO0: 768 fS (fS = 44.1 kHz)
– SCKO1: 768 fS, 512 fS (fS = 48 kHz)
– SCKO2: 256 fS (fS = 32, 44.1, 48, 64, 88.2,
96 kHz)
– SCKO3: 384 fS (fS = 32, 44.1, 48, 64, 88.2,
96 kHz)
Generated Audio System Clock (PLL170
    文件：365.33 Kbytes 頁數(shù)：25 Pages
    TI
    德州儀器
    

    PLL1707DBQR
    絲?。?strong>PLL1707；Package：SSOP；3.3-V DUAL PLL MULTICLOCK GENERATOR
    
FEATURES
27-MHz Master Clock Input
Generated Audio System Clock (PLL1707):
– SCKO0: 768 fS (fS = 44.1 kHz)
– SCKO1: 768 fS, 512 fS (fS = 48 kHz)
– SCKO2: 256 fS (fS = 32, 44.1, 48, 64, 88.2,
96 kHz)
– SCKO3: 384 fS (fS = 32, 44.1, 48, 64, 88.2,
96 kHz)
Generated Audio System Clock (PLL170
    文件：365.33 Kbytes 頁數(shù)：25 Pages
    TI
    德州儀器
    

    PLL1707DBQR.B
    絲印：PLL1707；Package：SSOP；3.3-V DUAL PLL MULTICLOCK GENERATOR
    
FEATURES
27-MHz Master Clock Input
Generated Audio System Clock (PLL1707):
– SCKO0: 768 fS (fS = 44.1 kHz)
– SCKO1: 768 fS, 512 fS (fS = 48 kHz)
– SCKO2: 256 fS (fS = 32, 44.1, 48, 64, 88.2,
96 kHz)
– SCKO3: 384 fS (fS = 32, 44.1, 48, 64, 88.2,
96 kHz)
Generated Audio System Clock (PLL170
    文件：365.33 Kbytes 頁數(shù)：25 Pages
    TI
    德州儀器
    

    PLL1707
    8.192MHz 至 36.864MHz、并行控制、3.3V 雙路 PLL 多時(shí)鐘發(fā)生器
    The PLL1707 are low cost, phase-locked loop (PLL) multiclock generators. The PLL1707 and PLL1708 can generate four system clocks from a 27-MHz reference input frequency. The clock outputs of the PLL1707 can be controlled by sampling frequency-control pins and those of the PLL1708 can be controlled t  ? 27-MHz Master Clock Input\n? SCKO0: 768 fS (fS = 44.1 kHz)\n? SCKO2: 256 fS (fS = 32, 44.1, 48, 64, 88.2, 96 kHz)\n? Generated Audio System Clock (PLL1708): \n? SCKO1: 768 fS, 512 fS, 384 fS , 256 fS (fS = 48 kHz)\n? SCKO3: 384 fS (fS = 16, 22.05, 24, 32, 44.1, 48, 64, 88.2, 96 kHz)\n? Zero PPM Er;
    TI
    德州儀器
    

    PLL1707IDBQRQ1
    絲印：PLL1707I；Package：SSOP；3.3-V DUAL-PLL MULTICLOCK GENERATOR
    
1FEATURES
? Qualified for Automotive Applications
? 27-MHz Master Clock Input
? Generated Audio System Clock
– SCKO0: 768 fS (fS = 44.1 kHz)
– SCKO1: 768 fS, 512 fS (fS = 48 kHz)
– SCKO2: 256 fS (fS = 32, 44.1, 48, 64, 88.2, 96
kHz)
– SCKO3: 384 f S (fS = 32, 44.1, 48, 64, 88.2, 96
kHz)

    文件：830.92 Kbytes 頁數(shù)：18 Pages
    TI
    德州儀器
    

    
            
    
		
        
    
            
    
                
    技術(shù)參數(shù)
    
            
    
            
      
            	
    • Number of outputs：
      4
    • Output frequency (Max) (MHz)：
      36.684
    • Core supply voltage (V)：
      3.3
    • Output supply voltage (V)：
      3.3
    • Input type：
      LVCMOS
    • Output type：
      LVCMOS
    • Operating temperature range (C)：
      -25 to 85
    • TI functional safety category：
      Functional Safety-Capable
    • Features：
      Dual PLL Multi-Clock
    • Rating：
      Catalog
    
            
    
        
    
            
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    更多PLL1707供應(yīng)商
            更新時(shí)間2026-1-22 10:21:00
        
    
        
    
          
    
            
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