TrenchMOS transistor Standard level FET

GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface mounting. Using ’trench’ technolgy the device features very low on-state resistance and has integral zener diodes giving ESD protection. It is intended for use in DC

文件：72.26 Kbytes 頁數(shù)：10 Pages

PHI

PHI

TrenchMOS transistor Standard level FET

恩XP

TrenchMOS transistor Logic level FET

GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface mounting. The device features very low on-state resistance and has integral zener diodes giving ESD protection. It is intended for use in DC-DC converters and genera

文件：64.11 Kbytes 頁數(shù)：9 Pages

PHI

PHI

TrenchMOS? transistor Logic level FET

GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface mounting. The device features very low on-state resistance and has integral zener diodes giving ESD protection. It is intended for use in DC-DC converters and

文件：171.36 Kbytes 頁數(shù)：10 Pages

NEXPERIA

安世

TrenchMOS transistor Standard level FET

GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface mounting. Using ’trench’ technolgy the device features very low on-state resistance and has integral zener diodes giving ESD protection. It is intended for use in DC

文件：72.26 Kbytes 頁數(shù)：10 Pages

PHI

PHI

N-channel TrenchMOS logic level FET

Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications only.

Nexperia

安世