TrenchMOS transistor Standard level FET

GENERAL DESCRIPTION N-channel enhancement mode standard level field-effect power transistor in a plastic envelope using ’trench’ technology. The device features very low on-state resistance and has integral zener diodes giving ESD protection up to 2kV. It is intended for use in DC-DC converters a

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PHI

PHI

TrenchMOS transistor Standard level FET

恩XP

N-channel TrenchMOS transistor Logic level FET

GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope using ’trench’ technology. FEATURES ? ’Trench’technology ? Very low on-state resistance ? Fast switching ? Low thermal resistance ? Logic level compatible Appl

文件：102.5 Kbytes 頁數：11 Pages

PHI

PHI

isc N-Channel MOSFET Transistor

FEATURES ·Drain Current -ID= 75A@ TC=25℃ ·Drain Source Voltage -VDSS= 30V(Min) ·Static Drain-Source On-Resistance -RDS(on) = 11mΩ(Max)@VGS= 10V DESCRIPTION ·DC-to-DC Converter ·General Industrial Applications ·Power Motor Control

文件：344.48 Kbytes 頁數：2 Pages

ISC

無錫固電

TrenchMOS transistor Standard level FET

GENERAL DESCRIPTION N-channel enhancement mode standard level field-effect power transistor in a plastic envelope suitable for surface mounting using ’trench’ technology. The device features very low on-state resistance and has integral zener diodes giving ESD protection up to 2kV. It is intended

文件：65.94 Kbytes 頁數：8 Pages

PHI

PHI