PowerMOS transistor Logic level FET

GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope featuring high avalanche energy capability, stable blocking voltage, fast switching and high thermal cycling performance with low thermal resistance. Intended for use in Switched Mode Po

文件：52.23 Kbytes 頁數(shù)：7 Pages

PHI

PHI

isc N-Channel MOSFET Transistor

FEATURES ·Drain Current -ID= 12A@ TC=25℃ ·Drain Source Voltage -VDSS= 60V(Min) ·Static Drain-Source On-Resistance -RDS(on) = 0.18Ω(Max)@VGS= 5V DESCRIPTION ·DC-to-DC Converter ·General Industrial Applications ·Power Motor Control

文件：371.93 Kbytes 頁數(shù)：2 Pages

ISC

無錫固電

PowerMOS transistor Logic level FET

恩XP

N-channel TrenchMOS transistor

GENERAL DESCRIPTION N-channel enhancement mode, field-effect power transistor in a plastic envelope with an electrically isolated mounting tab. The device uses ’trench’ technology to achieve low on-state resistance. FEATURES ? ’Trench’ technology ? Low on-state resistance ? Fast switching ?

文件：96.6 Kbytes 頁數(shù)：8 Pages

PHI

PHI

isc N-Channel MOSFET Transistor

FEATURES ·Drain Current -ID= 9A@ TC=25℃ ·Drain Source Voltage -VDSS= 55V(Min) ·Static Drain-Source On-Resistance -RDS(on) = 0.15Ω(Max)@VGS= 10V DESCRIPTION ·DC-to-DC Converter ·General Industrial Applications ·Power Motor Control

文件：318.71 Kbytes 頁數(shù)：2 Pages

ISC

無錫固電

PowerMOS transistor Logic level FET

GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic full-pack envelope. The device features high avalanche energy capability, stable blocking voltage, fast switching and high thermal cycling performance with low thermal resistance. Intended for us

文件：56.77 Kbytes 頁數(shù)：7 Pages

PHI

PHI